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參數(shù)資料
| 型號： | CY28326OC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | FTG for VIA PT880 Serial Chipset |
| 中文描述： | 333.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 288K |
| 代理商： | CY28326OC |
CY28326
Document #: 38-07616 Rev. *A
Page 12 of 23
PD# De-assertion
The power-up latency between PD# rising to a valid logic ‘1’
level and the starting of all clocks is less than 3.0 ms.
CPU_STP# Assertion
The CPU_STP# signal is an active low input used for
synchronous stopping and starting the CPU output clocks
while the rest of the clock generator continues to function.
When the CPU_STP# pin is asserted, all CPU outputs that are
set with the SMBus configuration to be stoppable via assertion
of CPU_STP# will be stopped after being sampled by three
rising edges of the internal CPUT clock. The final states of the
stopped CPU signals are CPUT = HIGH and CPUC = LOW.
There is no change to the output drive current values during
the stopped state. The CPUT is driven HIGH with a current
value equal to (Mult 0 ‘select’) x (Iref), and the CPUC signal
will not be driven. Due to the external pull-down circuitry,
CPUC will be LOW during this stopped state.
CPU_STP# De-assertion
The de-assertion of the CPU_STP# signal will cause all CPU
outputs that were stopped to resume normal operation in a
synchronous manner.
Synchronous manner meaning that no short or stretched clock
pulses will be produce when the clock resumes. The maximum
latency from the deassertion to active outputs is no more than
three CPU clock cycles.
REF, 14.31818
Tdrive_PD#
<300
μ
S, >200mV
PD#
CPUC,
133MHz
CPUT, 133MHz
AGP, 66MHz
48MHz
PCI, 33MHz
SRC, 25MHz
Tstable
<1.8ms
Figure 4. Power-down De-assertion Timing Waveforms
CPU_STP#
CPUT
CPUC
Figure 5. CPU_STP# Assertion Waveform
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY28326OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326OXC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28326OXCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326SPC | 制造商:Cypress Semiconductor 功能描述: |
| CY28329 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:133 MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs |
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