參數(shù)資料
型號(hào): CXD2724AQ-1
廠商: Sony Corporation
英文描述: Single-Chip Dolby Pro Logic Surround Decoder
中文描述: 單片杜比定向邏輯環(huán)繞聲解碼器
文件頁數(shù): 61/65頁
文件大?。?/td> 611K
代理商: CXD2724AQ-1
– 61 –
CXD2724AQ-1
8-6. Bypass Mode
In this mode, the DSP is bypassed. The ADC and DAC are not used and both the L and R channels are in
analog-to-analog through status.
(1) Setting Bypass Mode
Set the uppermost bit (SQA15) of setup register Field A to "1".
The other setup data and coefficient data is "Don't care".
MUX &
LPF
LPF
LIN
LOUT
MUX &
LPF
LPF
RIN
ROUT
Fig. 8-6-1. Bypass Mode
In bypass mode, the output after ADC prefilter and the output after DAC postfilter are swtiched by the analog
switch. The popping noise occurs at switching due to the difference of these filter's reference voltages
(500mV). Therefore, the countermeasure against the noise, such as the system muting, is required when using
this mode.
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