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參數(shù)資料
| 型號(hào)： | CXD2724AQ-1 |
| 廠商： | Sony Corporation |
| 英文描述： | Single-Chip Dolby Pro Logic Surround Decoder |
| 中文描述： | 單片杜比定向邏輯環(huán)繞聲解碼器 |
| 文件頁數(shù)： | 49/65頁 |
| 文件大?。?/td> | 611K |
| 代理商： | CXD2724AQ-1 |
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– 49 –
CXD2724AQ-1
(2) Setting Data
(2)-1. Setup Data
Table 8-5-1 lists the registers most closely related to SFC mode.
Setup data not listed in Table 8-5-1 may be set as desired, with due consideration given to the contents of
Fields A to D noted in "6. Setup Register".
00: No decimation, 01: 1/2, 10: 1/3
01: SFC mode
Center channel (C-ch) trim volume
Surround channel (S-ch) trim volume
00: No decimation, 01: 1/2, 1
: 1/3
Coefficient RAM area setting (111: SFC mode)
SQA11, 10
SQA05, 04
SQB15 to 11
SQB10 to 06
SQC07, 06
SQD02 to 00
Don't care
"01"
Don't care
Don't care
Don't care
"111"
Register name
Setting value
Remarks
Table 8-5-1. SFC Mode Setup Register Settings
(2)-2. Coefficient Data
The SFC mode coefficient data uses the RAM for the entire area. Also, like other modes, the coefficient data
consists of fixed values and setting values.
Fixed values during SFC mode initialization
The following fixed values must be set in the coefficient RAM to ensure proper DSP internal operation.
00H
01H
38H
39H
3aH
3bH
3cH
3dH
3eH
3fH
40H
41H
42H
43H
44H
45H
Address
7fe8H
7fd1H
0000H
0092H
0209H
02cdH
0109H
fda9H
fd19H
0189H
058aH
016dH
f7beH
f72aH
0a4eH
2706H
Fixed value
46H
47H
48H
49H
4aH
4bH
4cH
4dH
4eH
4fH
50H
51H
52H
53H
54H
55H
Address
34eeH
0000H
6000H
ff80H
00a1H
016eH
01f8H
0193H
0024H
fe70H
fdbaH
fed8H
015aH
037fH
0344H
ffffH
Fixed value
56H
57H
58H
59H
5aH
5bH
5cH
6dH
6eH
6fH
70H
71H
72H
73H
74H
75H
Address
fb5cH
f8e3H
fbf6H
0575H
129cH
1e0dH
2294H
051eH
ff86H
02a0H
f6c0H
2715H
4000H
5149H
e571H
0f4eH
Fixed value
76H
77H
78H
79H
7aH
7bH
7cH
7dH
7eH
7fH
80H
94H
d7H
d8H
daH
dbH
Address
f5b8H
075cH
fa97H
0402H
fd0bH
0225H
fe7cH
01d3H
f312H
4b85H
0000H
7fffH
68a9H
5121H
7ff4H
7fe8H
Fixed value
Table 8-5-2. SFC Mode Fixed Value Coefficients
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