參數(shù)資料
型號: CDB4364
廠商: Cirrus Logic Inc
文件頁數(shù): 29/50頁
文件大?。?/td> 0K
描述: EVALUATION BOARD FOR CS4364
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 6
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: CS4364
相關(guān)產(chǎn)品: CS4364-CQZR-ND - IC DAC 103DB 24BIT 6CH 48-LQFP
598-1059-ND - IC DAC 103DB 24BIT 6CH 48-LQFP
DS619F1
35
CS4364
6.3.2
Functional Mode (FM)
Default = 11
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 200 kHz sample rates)
11 - Auto Speed Mode detect (32 kHz to 200 kHz sample rates)
Function:
Selects the required range of input sample rates or Auto Speed Mode.
6.4
DSD Control (Address 04h)
6.4.1
DSD Mode Digital Interface Format (DSD_DIF)
Default = 000 - Format 0 (64x oversampled DSD data with a 4x MCLK to DSD data rate)
Function:
The relationship between the oversampling ratio of the DSD audio data and the required Master clock to
DSD data rate is defined by the Digital Interface Format pins.
The DSD/PCM bit determines whether PCM or DSD Mode is selected.
DIF3
DIF2
DIF1
DIF0
DESCRIPTION
Format
FIGURE
00
0
Left Justified, up to 24-bit data
0
00
0
1
I2S, up to 24-bit data
1
00
1
0
Right Justified, 16-bit data
2
00
1
Right Justified, 24-bit data
3
01
0
Right Justified, 20-bit data
4
01
0
1
Right Justified, 18-bit data
5
10
0
One-line Mode 1, 24-bit Data
8
10
0
1
One-line Mode 2, 20-bit Data
9
XX
X
All other combinations are Reserved
Table 7. Digital Interface Formats - PCM Mode
76
5
4
3
2
1
0
DSD_DIF2
DSD_DIF1
DSD_DIF0
DIR_DSD
STATIC_DSD
INVALID_DSD
DSD_PM_MD
DSD_PM_EN
00
0
1
0
DIF2
DIF1
DIFO
DESCRIPTION
0
64x oversampled DSD data with a 4x MCLK to DSD data rate
0
1
64x oversampled DSD data with a 6x MCLK to DSD data rate
0
1
0
64x oversampled DSD data with a 8x MCLK to DSD data rate
0
1
64x oversampled DSD data with a 12x MCLK to DSD data rate
1
0
128x oversampled DSD data with a 2x MCLK to DSD data rate.
1
0
1
128x oversampled DSD data with a 3x MCLK to DSD data rate.
1
0
128x oversampled DSD data with a 4x MCLK to DSD data rate.
1
128x oversampled DSD data with a 6x MCLK to DSD data rate.
Table 8. Digital Interface Formats - DSD Mode
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