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參數(shù)資料
| 型號： | CBTL12131ET |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | DisplayPort multiplexer for bidirectional video in all-in-one computer systems |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| 封裝： | 6 X 6 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-195, SOT543-1, TFBGA-64 |
| 文件頁數(shù)： | 27/28頁 |
| 文件大?。?/td> | 215K |
| 代理商： | CBTL12131ET |
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CBTL12131
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 25 February 2011
8 of 28
NXP Semiconductors
CBTL12131
DisplayPort multiplexer for bidirectional video
Port C terminals
ML_C_0P
K1
differential port terminal
Four high-speed differential pairs for DisplayPort Main Link signals,
Port C. Designated as port facing the GPU for internal video. Port C
will be exclusively connected to Port D when PATH_SEL = LOW, and
will be high-impedance when PATH_SEL = HIGH.
ML_C_0N
J1
differential port terminal
ML_C_1P
K2
differential port terminal
ML_C_1N
J2
differential port terminal
ML_C_2P
K3
differential port terminal
ML_C_2N
J3
differential port terminal
ML_C_3P
K4
differential port terminal
ML_C_3N
J4
differential port terminal
AUX_C_P
H1
differential port terminal
High-speed differential pair for DisplayPort AUX signals, Port C.
AUX_C_N
H2
differential port terminal
HPD_C
K5
3.3 V LVTTL
single-ended output
3.3 V LVTTL HPD output for Port C. When PATH_SEL = LOW, this
output follows the state of HPD_D (from internal sink). When
PATH_SEL = HIGH, this output is always LOW.
Port D terminals
ML_D_0P
A1
differential port terminal
Four high-speed differential pairs for DisplayPort Main Link signals,
Port D. Designated as port facing the internal eDP display module
connector. Port D will be exclusively connected to Port C when
PATH_SEL = LOW, and will be exclusively connected to Port B when
PATH_SEL = HIGH.
ML_D_0N
B1
differential port terminal
ML_D_1P
A2
differential port terminal
ML_D_1N
B2
differential port terminal
ML_D_2P
A3
differential port terminal
ML_D_2N
B3
differential port terminal
ML_D_3P
A4
differential port terminal
ML_D_3N
B4
differential port terminal
AUX_D_P
C1
differential port terminal
High-speed differential pair for DisplayPort AUX signals, Port D.
AUX_D_N
C2
differential port terminal
HPD_D
A5
3.3 V LVTTL
single-ended input
5 V tolerant HPD input for Port D, to be connected to the internal
sink.
Supply and ground
VDD
B5,
E2,
E9,
J5
power supply
3.3 V power supply pins.
GND
B6,
F2,
J6
ground
Ground pins.
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
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相關(guān)代理商/技術(shù)參數(shù) |
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| CBTL12131ET,518 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 1.1 MUX BI-DRC VIDEO 1 DISPLAYPORT CONN RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBTL12131ET518 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| CBTL1608A1UK,012 | 制造商:NXP Semiconductors 功能描述:PHACBTL1608A1UK,012 IC,HIGH SPEED SWITCH |
| CBTL1608A1UK,019 | 制造商:NXP Semiconductors 功能描述:PHACBTL1608A1UK,019 IC,HIGH SPEED SWITCH |
| CBTL1610A1UKAZ | 制造商:NXP Semiconductors 功能描述:LINEAR IC |
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