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參數(shù)資料
| 型號(hào)： | BXM80526B600128 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 600 MHz, MICROPROCESSOR, PBGA495 |
| 封裝： | BGA2-495 |
| 文件頁數(shù)： | 65/74頁 |
| 文件大?。?/td> | 870K |
| 代理商： | BXM80526B600128 |
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Mobile Intel Celeron Processor (0.18) in BGA2 and Micro-PGA2 Packages
at 700MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, 450 MHz,
Low-voltage 500 MHz, and Low-voltage 400A MHz
Datasheet
Order#-XXX
61
THERMDA, THERMDC (Analog)
The THERMDA (Thermal Diode Anode) and THERMDC (Thermal Diode Cathode) signals
connect to the anode and cathode of the on-die thermal diode.
TMS (I - 1.5V Tolerant)
The TMS (Test Mode Select) signal is a JTAG support signal used by debug tools.
TRDY# (I - GTL+)
The TRDY# (Target Ready) signal is asserted by the target to indicate that the target is ready to
receive write or implicit write-back data transfer. TRDY# must be connected to the appropriate
pins/balls on both agents on the system bus.
TRST# (I - 1.5V Tolerant)
The TRST# (Test Reset) signal resets the Test Access Port (TAP) logic. The mobile processors do
not self-reset during power on; therefore, it is necessary to drive this signal low during power-on
reset.
VID[4:0] (O – Open-drain)
The VID[4:0] (Voltage ID) pins/balls can be used to support automatic selection of power supply
voltages. These pins/balls are not signals, they are either an open circuit or a short to VSS on the
processor substrate. The combination of opens and shorts encodes the voltage required by the
processor. External to pull-ups are required to sense the encoded VID. VID[4:0] are needed to
cleanly support voltage specification changes on mobile Celeron processors. The voltage encoded
by VID[4:0] is defined in Table 36. A “1” in this table refers to an open pin/ball and a “0” refers to
a short to VSS. The power supply must provide the requested voltage or disable itself.
Please note that in order to implement VID on the BGA2 package, some VID[4:0] balls may be
depopulated. For the BGA2 package, a “1” in Table 36 implies that the corresponding VID ball is
depopulated, while a “0” implies that the corresponding VID ball is not depopulated.
But on the Micro-PGA2 package, VID[4:0] pins are not depopulated.
Table 36. Voltage Identification Encoding
VID[4:0]
VCC
VID[4:0]
VCC
VID[4:0]
VCC
VID[4:0]
VCC
00000
2.00
01000
1.60
10000
1.275
11000
1.075
00001
1.95
01001
1.55
10001
1.250
11001
1.050
00010
1.90
01010
1.50
10010
1.225
11010
1.025
00011
1.85
01011
1.45
10011
1.200
11011
1.000
00100
1.80
01100
1.40
10100
1.175
11100
0.975
00101
1.75
01101
1.35
10101
1.150
11101
0.950
00110
1.70
01110
1.30
10110
1.125
11110
0.925
00111
1.65
01111
No CPU
10111
1.100
11111
No CPU
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