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參數(shù)資料
| 型號： | BX80532RC2400B |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 2400 MHz, MICROPROCESSOR |
| 文件頁數(shù)： | 37/99頁 |
| 文件大?。?/td> | 4142K |
| 代理商： | BX80532RC2400B |
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42
Datasheet
System Bus Signal Quality Specifications
3.2
System Bus Signal Quality Specifications and
Measurement Guidelines
Various scenarios have been simulated to generate a set of AGTL+ layout guidelines that are
available in the Platform Design Guideline.
Table 24 provides the signal quality specifications for all processor signals for use in simulating
signal quality at the processor core silicon. The Celeron processor on 0.13 micron process
maximum allowable overshoot and undershoot specifications are provided in Table 26 through
Figure 23 shows ringback tolerance for high-to-low transitions.
NOTES:
1. All signal integrity specifications are measured at the processor silicon.
2. Unless otherwise noted, all specifications in this table apply to all Celeron processor on 0.13 micron process
frequencies.
3. Specifications are for the edge rate of 0.3 – 4.0 V/ns.
4. All values specified by design characterization.
5. See Section 3.3 for maximum allowable overshoot duration.
6. Ringback between GTLREF + 10% and GTLREF – 10% is not supported.
7. Intel recommends that simulations not exceed a ringback value of GTLREF ± 200 mV to allow margin for
other sources of system noise.
NOTES:
1. All signal integrity specifications are measured at the processor silicon.
2. Unless otherwise noted, all specifications in this table apply to all Celeron processor on 0.13 micron process
frequencies.
3. See Section 3.3 for maximum allowable overshoot.
4. See Section 2.11 for the DC specifications.
Table 24. Ringback Specifications for AGTL+ and Asynchronous GTL+ Signals Groups
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
All Signals
0
→ 1
GTLREF + 10%
V
1, 2, 3, 4, 5, 6, 7
All Signals
1
→ 0
GTLREF – 10%
V
1, 2, 3, 4, 5, 6, 7
Table 25. Ringback Specifications for PWRGOOD Input and TAP Signal Group
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
TAP and PWRGOOD
0
→ 1
Vt+(max) TO Vt-(max)
V
1, 2, 3, 4
TAP and PWRGOOD
1
→ 0
Vt-(min) TO Vt+(min)
V
1, 2, 3, 4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BX80532RC2500B | 制造商:Intel 功能描述:MPU CELERON PROCESSOR 0.13UM 2.5GHZ 478-PIN FCPGA2 - Boxed Product (Development Kits) |
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| BX80532RC2800B | 制造商:Intel 功能描述:MPU CELERON PROCESSOR 0.13UM 2.8GHZ - Boxed Product (Development Kits) |
| BX80536NC1700EJ | 制造商:Intel 功能描述:MPU CELERON PROCESSOR 390 RISC 64-BIT 90NM 1.7GHZ 1.05V - Boxed Product (Development Kits) |
| BX80537T5500 S L9SH | 制造商:Intel 功能描述:MPU Core?2 Duo Processor T5500 64-Bit 65nm 1.66GHz 1.05V 478-Pin FCPGA6 |
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