參數(shù)資料
型號: BQ2060SS
英文描述: Silicon Bridge Rectifiers
中文描述: 集成電路表面貼裝,棉絮電荷監(jiān)視器
文件頁數(shù): 36/46頁
文件大?。?/td> 364K
代理商: BQ2060SS
Hold-off
Time
f0
f1
f2
f3
f4
f5
f6
f7
Hold-off
Time (s)
320
300
280
260
240
220
200
180
Hold-off
Time
f8
f9
fa
fb
fc
fd
fe
ff
Hold-off
Time (s)
160
140
120
100
80
60
40
20
Current Taper Termination Characteristics
Two factors in the EEPROM set the current taper termi-
nation for Li-Ion battery packs. The two coded locations
are
Current Taper Qual Voltage
EE 0x4f and
Current
Taper Threshold
EE 0x4e. Current taper termination oc-
curs during charging when the pack voltage is above the
charging voltage minus CELLV (mV) and the charging
current is below the threshold coded in
Current Taper
Threshold
forat least 40s.
Current Taper Qual Voltage
=CELLV
2
(23)
Current Taper Threshold
=
R
i
0.5625
S
(24)
where i = the desired current termination threshold in
mA,and R
S
=VFCsense resistor in ohms.
Pack Options
Pack Configuration
Pack Configuration
EE 0x3f contains bit-programmable
features.
DMODE
The DMODE bit determines whether the LED outputs
will
indicate
AbsoluteStateOfCharge()
RelativeStateOfCharge()
or
0
LEDs reflect AbsoluteStateOfCharge()
1
LEDs reflect RelativeStateOfCharge()
SEAL
The SEAL bit determines the SMBus access state of the
bq2060 on reset
0
SMBus commands (0x00–0xff) are accessible for
both read and write.
1
SMBus read access is limited to commands
(0x05–0x1c) and (0x20–0x23). SMBus read/write
access is limited to commands (0x00–0x04), (0x2f),
and (0x3c–0x3f).
CSYNC
In usual operation of the bq2060, the CSYNC bit is set
so that the coulomb counter is adjusted when a fast
charge termination is detected. In some applications, es-
pecially those where an externally controlled charger is
used, it may be desirable NOT to adjust the coulomb
counter. In these cases the CSYNC bit should be
cleared.
0
The bq2060 does not alter RM at the time of a valid
charge termination
1
The bq2060 sets update RM with a programmed
percentage ofFCC.
CEDV
The CEDV bit determines whether the bq2060 imple-
ments automatic EDV compensation to calculate the
EDV0, EDV1 and EDV2 thresholds base on rate, tem-
perature, and capacity. If reset, the bq2060 uses the val-
ues programmed in EEPROM for EDV0, EDV1 and
EDV2. If set the bq2060 calculates EDV0, EDV1 and
EDV2.
0
EDVcompensation disabled
1
EDVcompensation enabled
VCOR
The VCOR bit enables the midrange voltage correction
algorithm. When set, the bq2060 compares the pack
voltage to RM and may adjust RM according to the val-
ues programmed in
VOC25
,
VOC50
, and
VOC75
.
0
Midrange corrections disabled
1
Midrange corrections enabled
36
bq2060
b7
b6
b5
b4
b3
b2
b1
b0
DMODE SEAL
CSYNC
CEDV
VCOR
CHEM
LCC1
LCC0
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