參數(shù)資料
型號: BGB101
廠商: NXP SEMICONDUCTORS
元件分類: 通信及網(wǎng)絡(luò)
英文描述: 0 dBm Bluetooth radio module
中文描述: SPECIALTY TELECOM CIRCUIT, PBGA28
文件頁數(shù): 6/17頁
文件大小: 161K
代理商: BGB101
2003 Aug 05
6
Philips Semiconductors
Preliminary specification
0 dBm Bluetooth radio module
BGB101
Table 1
Bit allocation
Notes
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The RF frequency is equal to 2304 + d[b7:b0] (see Table 2).
In normal operation, 32 bits are programmed into the register.
bits b31 to b20 and b17 to b15 are test bits and must always be programmed as described in table 1.
Bit b19 defines the transmit rampup mode (see Table 6)
Bit b18 defines the dc extraction mode (see Table 5).
Bit b7 is the MSB of the frequency control word composed of (b7, b6, b5, b4, b3, b2, b1 and b0).
ref: bits
ref1
and
ref0
define the reference frequency (see Table 3).
pwr: bits,
pwr2
,
pwr1
and
pwr0
define the the typical output power (see Table 4).
pll: bit
pll
= 1 forces the synthesizer PLL to remain on during the entire (TX or RX) slot.
trx: bit
trx
= 1 forces the IC into RX mode.
Table 2
Channel frequency programming examples
Table 3
Reference frequency programming
REGISTER BIT ALLOCATION
(1)
Data field
F
IRST
IN
b31
(2)
b30
(2)
b29
(2)
b28
(2)
b27
(2)
b26
(2)
b25
(2)
b24
(2)
b23
(2)
b22
(2)
b21
(2)
b20
(2)
b19
(3)
b18
(4)
b17
(2)
b16
(2)
see
below
0
0
0
0
0
0
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
0
0
L
AST
IN
see
above
b15
(2)
b14
b13
b12
b11
b10
b9
b8
b7 to b0
(6)
0
ref1
(7)
ref0
(7)
pwr2
(8)
pwr1
(8)
pwr0
(8)
pll
(9)
trx
(10)
main divider programming
(11)
b7
b6
b5
b4
b3
b2
b1
b0
MAIN DIVIDER
RATIO
SYNTHESIZED
FREQUENCY
(MHz)
1.0
×
(2304 +n)
2402
2403
CHANNEL
FREQUENCY
Binary equivalent of n
0
0
2304 + n
2402
2403
0
0
1
1
1
1
0
0
0
0
1
1
0
1
TX channel 1
RX channel 1
TX channel 2
RX channel 78
TX channel 79
RX channel 79
1
0
1
1
0
0
0
0
2480
2480
1
0
1
1
0
0
0
1
2481
2481
b14
b13
REFERENCE DIVIDER RATIO
REFERENCE INPUT
FREQUENCY
0
1
0
0
12
13
12 MHz
13 MHz
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