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參數(shù)資料
| 型號： | BGB101 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | 0 dBm Bluetooth radio module |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA28 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 161K |
| 代理商： | BGB101 |
2003 Aug 05
5
Philips Semiconductors
Preliminary specification
0 dBm Bluetooth radio module
BGB101
The output stage of the transmit chain active part is balanced, for reduced spurious emissions (EMC). It is connected
through a balun (balanced-to-unbalanced) circuit to the TX/RX switch. This switch is controlled by internal logic circuits
in the active die. The balun circuit has built-in selectivity, to further reduce out-of-band spurious emissions.
The output amplifier of the IC is switched on by pulling the DCXCTR control line high. This can be done before the S_EN
line goes low. In this mode, the PLL compensates for the frequency jump (pulling) that might otherwise be caused by
switching the output amplifier on when the PLL would already have been de-activated.
The DCXCTR line should be kept high during the entire TX slot.
The output power level is programmable with a dynamic range of approximately 19 dB with a maximum step size of 4 dB.
In this way, a simple power amplifier can be added in the application with power control implemented by reducing the
pre-amplifier gain.
Receive mode
Also the receiver functionality is fully integrated. It is a near-zero-IF (1 MHz) architecture with active image rejection.
The integrated channel filters use a build-in auto calibration scheme, providing an excellent sensitivity over a wide
temperature range. The sensitive RX input of the active die is a balanced configuration, in order to reduce unwanted
(spurious) responses. The balun structure to convert from unbalanced to balanced signals has built-in selectivity. This
suppresses GSM-900 frequencies by more than 40 dB. For better immunity to DCS, DECT, GSM-1800 and W_CDMA
signals, an extra band-pass filter has been included.
The synthesizer PLL may be switched off during demodulation. This reduces the effects that reference frequency
breakthrough may have on receiver sensitivity and adjacent channel selectivity, and also reduces the power
consumption. The demodulator contains an advanced DC offset compensation circuit. This reduces the effects of
frequency mismatch between (remote) transmitter and receiver. These may be caused by differences in reference
frequency, but also by frequency drift during open-loop modulation and demodulation.
Because the VCO is directly modulated by the signal present at the T_GFSK pin, this pin should be connected to a
well-defined and stable DC bias voltage, also when in RX mode. Moreover, this bias voltage should already be present
during the S_EN programming pulse. In this way, the PLL can correct for possible frequency offsets that might otherwise
occur.
The demodulated RF signal is compared against a reference (slicer) value and then output. This reference voltage is
derived from the demodulated output signal itself, by the DC extractor circuit. It operates in three subsequent phases,
controlled by the DCXCTR signal:
In the first phase, during the preamble and the early part of the Access Code, a Min/Max detector provides a crude but
fast estimate of the required DC voltage. The DCXCTR line should be low during this phase.
When the DCXCTR line is pulled high, this crude estimate is used as an initial guess for an integrator circuit that
provides an accurate estimate of the required DC voltage. This is the second phase. The DC value obtained is derived
from the Barker sequence and the trailer, which together make up the final 10 bits of the Access Code. The DCXCTR
line should be pulled high 20
μ
s before the trailer sequence is expected to end (there is a
±
10
μ
s timing uncertainty
between the expected and the actual end of the trailer sequence).
Exactly at the end of the trailer, the DCXCTR must be pulled low again. The device now enters the third phase, during
which the estimate of the offset voltage that was obtained during phases one and two is retained. A small and slow
variation to compensate carrier frequency drift can still be tracked.
An RSSI output with a high dynamic range of more than 50 dB provides near-instantaneous information on the quality
of the signal received.
Due to the IF frequency at 1 MHz, in RX mode the VCO frequency should be 1 MHz higher than the channel frequency.
This should be taken care of by the baseband controller.
Power-down mode
In Power-down mode, current consumption is reduced to 5
μ
A (typical). The 3-wire bus inputs present a high-ohmic
resistance to ground.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| BGB110 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bluetooth radio module |
| BGB201 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bluetooth System-in-a-Package radio with baseband controller |
| BGB203 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bluetooth System-in-a-Package radio with baseband controller |
| BGB203/H1/S06,518 | 功能描述:RF片上系統(tǒng) - SoC BLUETOOTH 1.2 SIP RoHS:否 制造商:Texas Instruments 類型:Zigbee 處理器系列:CC253 核心:8051 最大數(shù)據(jù)速率:250 Kbps 輸出功率:4.5 dBm 靈敏度:- 97 dBm 工作電源電壓:2 V to 3.6 V 接收供電電流:24.3 mA 傳輸供電電流:33.5 mA 程序存儲器大小:256 KB 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:QFN-40 |
| BGB203/H1/S06-T | 功能描述:RF片上系統(tǒng) - SoC BLUETOOTH 1.2 SIP RoHS:否 制造商:Texas Instruments 類型:Zigbee 處理器系列:CC253 核心:8051 最大數(shù)據(jù)速率:250 Kbps 輸出功率:4.5 dBm 靈敏度:- 97 dBm 工作電源電壓:2 V to 3.6 V 接收供電電流:24.3 mA 傳輸供電電流:33.5 mA 程序存儲器大小:256 KB 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:QFN-40 |
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