參數(shù)資料
型號: ATMEGA324A-MCHR
廠商: Atmel
文件頁數(shù): 7/160頁
文件大?。?/td> 0K
描述: IC MCU AVR 32K 20MHZ 44QFN
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
megaAVR Introduction
標(biāo)準(zhǔn)包裝: 6,000
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 帶卷 (TR)
其它名稱: ATMEGA324A-MCHR SL383
ATMEGA324A-MCHR-ND
ATMEGA324A-MCHRTR
104
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
15.9
Register description
15.9.1
TCCR0A – Timer/Counter Control Register A
Bits 7:6 – COM0A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting. Table 15-2 shows the COM0A1:0 bit functionality when the WGM02:0 bits
are set to a normal or CTC mode (non-PWM).
Table 15-3 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
mode.
Note:
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See ”Fast PWM mode” on
page 99 for more details.
Table 15-4 on page 105 shows the COM0A1:0 bit functionality when the WGM02:0 bits are set
to phase correct PWM mode.
Bit
7
6
5
4
3
210
COM0A1
COM0A0
COM0B1
COM0B0
WGM01
WGM00
TCCR0A
Read/Write
R/W
R
R/W
Initial Value
0
Table 15-2.
Compare Output mode, non-PWM mode.
COM0A1
COM0A0
Description
0
Normal port operation, OC0A disconnected
0
1
Toggle OC0A on Compare Match
1
0
Clear OC0A on Compare Match
1
Set OC0A on Compare Match
Table 15-3.
Compare Output mode, Fast PWM mode
COM0A1
COM0A0
Description
0
Normal port operation, OC0A disconnected.
01
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
10
Clear OC0A on Compare Match, set OC0A at BOTTOM,
(non-inverting mode).
11
Set OC0A on Compare Match, clear OC0A at BOTTOM,
(inverting mode).
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