參數(shù)資料
型號(hào)： ATMEGA103-6AI
廠商： Atmel
文件頁數(shù)： 51/141頁
文件大?。?/td> 0K
描述： IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓(xùn)模塊： megaAVR Introduction
標(biāo)準(zhǔn)包裝： 90
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 6MHz
連通性： SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 128KB（64K x 16）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
配用： ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
17
ATmega103(L)
0945I–AVR–02/07
Program execution continues at address PC + k + 1. The relative address k is -2048 to
2047.
EEPROM Data Memory
The EEPROM memory is organized as a separate Data space in which single bytes can
be read and written. The EEPROM has an endurance of at least 100,000 write/erase
cycles. The access between the EEPROM and the CPU is described on page 57 speci-
fying the EEPROM Address Register, the EEPROM Data Register and the EEPROM
Control Register.
Memory Access Times
and Instruction
Execution Timing
This section describes the general access timing concepts for instruction execution and
internal memory access.
The AVR CPU is driven by the System Clock , directly generated from the external
clock crystal for the chip. No internal clock division is used.
Figure 20 shows the parallel instruction fetches and instruction executions enabled by
the Harvard architecture and the fast-access Register File concept. This is the basic
pipelining concept to obtain up to 1 MIPS per MHz with the corresponding unique results
for functions per cost, functions per clocks and functions per power unit.
Figure 20. The Parallel Instruction Fetches and Instruction Executions
Figure 21 shows the internal timing concept for the Register File. In a single clock cycle,
an ALU operation using two register operands is executed and the result is stored back
to the destination register.
Figure 21. Single Cycle ALU Operation
System Clock
1st Instruction Fetch
1st Instruction Execute
2nd Instruction Fetch
2nd Instruction Execute
3rd Instruction Fetch
3rd Instruction Execute
4th Instruction Fetch
T1
T2
T3
T4
System Clock
Total Execution Time
Register Operands Fetch
ALU Operation Execute
Result Write Back
T1
T2
T3
T4
相關(guān)PDF資料
PDF描述
ATMEGA128A-AUR MCU AVR 128K FLASH 16MHZ 64TQFP
ATMEGA128L-8MJ IC MCU AVR 128K 8MHZ LV 64-QFN
ATMEGA16-16MUR MCU AVR 16KB FLASH 16MHZ 44QFN
ATMEGA164PA-AN IC MCU AVR 16K FLASH 44TQFP
ATMEGA164PA-CUR MCU AVR 16KB FLASH 20MHZ 49VFBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATMEGA103L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 128K Bytes In-System Programmable Flash
ATMEGA103L-4AC 功能描述:8位微控制器 -MCU TQFP-64 128K FLASH 3 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA103L-4AI 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 64K/128K Bytes In-System Programmable Flash
ATMEGA128 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 128K Bytes In-System Programmable Flash
ATMEGA128(L) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATmega128(L) Preliminary Summary [Updated 9/03. 23 Pages]
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*