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參數(shù)資料
| 型號： | ATF-521P8-BLKG |
| 廠商： | AGILENT TECHNOLOGIES INC |
| 元件分類： | 小信號晶體管 |
| 英文描述： | C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229 |
| 封裝： | 2 X 2 MM, 0.75 MM HEIGHT, LPCC-8 |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 248K |
| 代理商： | ATF-521P8-BLKG |
16
Active Bias[2]
Due to very high DC power
dissipation and small package
constraints, it is recommended
that ATF-521P8 use active
biasing. The main advantage of
an active biasing scheme is the
ability to hold the drain to source
current constant over a wide
range of temperature variations.
A very inexpensive method of
accomplishing this is to use two
PNP bipolar transistors arranged
in a current mirror configuration
as shown in Figure 9. Due to
resistors R1 and R3, this circuit
is not acting as a true current
mirror, but if the voltage drop
across R1 and R3 is kept identi-
cal then it still displays some of
the more useful characteristics of
a current mirror. For example,
transistor Q1 is configured with
its base and collector tied
together. This acts as a simple PN
junction, which helps tempera-
ture compensate the Emitter-
Base junction of Q2.
To calculate the values of R1, R2,
R3, and R4 the following param-
eters must be know or chosen
first:
Ids is the device drain-to-source
current;
I
R is the Reference current for
active bias;
Vdd is the power supply voltage
available;
V
ds is the device drain-to-source
voltage;
Vg is the typical gate bias;
V
be1 is the typical Base-Emitter
turn on voltage for Q1 & Q2;
Therefore, resistor R3, which sets
the desired device drain current,
is calculated as follows:
R3 =
V
dd – V
ds
(4)
p
Ids + IC2
where,
IC2 is chosen for stability to be
10 times the typical gate current
and also equal to the reference
current I
R.
The next three equations are
used to calculate the rest of the
biasing resistors for Figure 9.
Note that the voltage drop across
R1 must be set equal to the
voltage drop across R3, but with
a current of I
R.
R1 =
V
dd – V
ds
(5)
p
IR
R2 sets the bias current through
Q1.
R2 =
V
ds – V
be1
(6)
p
IR
R4 sets the gate voltage for
ATF-521P8.
R4 =
V
g
(7)
p
IC2
Thus, by forcing the emitter
voltage (V
E) of transistor Q1
equal to V
ds, this circuit regulates
the drain current similar to a
current mirror. As long as Q2
operates in the forward active
mode, this holds true. In other
words, the Collector-Base junc-
tion of Q2 must be kept reversed
biased.
C1
RFin
RFout
L4
L1
L2
L3
R6
R5
R3
R4
C4
C3
C7
C8
C6
C5
Q2
C2
R1
R2
Q1
VE
Vg
Vds
Vdd
2
7
ATF-521P8
2PL
Figure 9. Active Bias Circuit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ATF-521P8-TR2 | L BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229 |
| ATF-521P8-TR1 | L BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229 |
| ATF-521P8-BLK | L BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229 |
| ATF-53189-TR1 | C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET |
| ATF-53189-BLK | C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATF-521P8-TR1 | 功能描述:射頻GaAs晶體管 Transistor GaAs High Linearity RoHS:否 制造商:TriQuint Semiconductor 技術(shù)類型:pHEMT 頻率:500 MHz to 3 GHz 增益:10 dB 噪聲系數(shù): 正向跨導(dǎo) gFS（最大值/最小值）:4 S 漏源電壓 VDS: 閘/源擊穿電壓:- 8 V 漏極連續(xù)電流:3 A 最大工作溫度:+ 150 C 功率耗散:10 W 安裝風格: 封裝 / 箱體: |
| ATF-521P8-TR2 | 功能描述:射頻GaAs晶體管 Transistor GaAs High Linearity RoHS:否 制造商:TriQuint Semiconductor 技術(shù)類型:pHEMT 頻率:500 MHz to 3 GHz 增益:10 dB 噪聲系數(shù): 正向跨導(dǎo) gFS（最大值/最小值）:4 S 漏源電壓 VDS: 閘/源擊穿電壓:- 8 V 漏極連續(xù)電流:3 A 最大工作溫度:+ 150 C 功率耗散:10 W 安裝風格: 封裝 / 箱體: |
| ATF524S16M | 制造商:n/a 功能描述:Inverter Semiconductor |
| ATF-53189 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Enhancement Mode Pseudomorphic HEMT in SOT 89 Package |
| ATF-53189-BLK | 功能描述:射頻GaAs晶體管 Transistor GaAs High Linearity RoHS:否 制造商:TriQuint Semiconductor 技術(shù)類型:pHEMT 頻率:500 MHz to 3 GHz 增益:10 dB 噪聲系數(shù): 正向跨導(dǎo) gFS（最大值/最小值）:4 S 漏源電壓 VDS: 閘/源擊穿電壓:- 8 V 漏極連續(xù)電流:3 A 最大工作溫度:+ 150 C 功率耗散:10 W 安裝風格: 封裝 / 箱體: |
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