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參數(shù)資料
| 型號： | AT75C1010 |
| 英文描述： | AT75C1010 Telephony Software Module [Updated 11/01. 29 Pages] This software module runs on the OakDSPCore subsystem of the AT75 series SIAP. expanding its capabilities and making the processor flexible and east to integrate into most operating systems. |
| 中文描述： | AT75C1010電話軟件模塊[更新11/01。 29頁]本軟件模塊上運行的AT75系列OakDSPCore子系統(tǒng)統(tǒng)計所。擴(kuò)大其能力，使處理器的靈活和東部地區(qū)融入大多數(shù)操作系統(tǒng)。 |
| 文件頁數(shù)： | 89/171頁 |
| 文件大?。?/td> | 1288K |
| 代理商： | AT75C1010 |
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AT75C DSP Subsystem
1368C–INTAP–08/02
Set if the overflow flag was set (overflow latch) or if a limitation occurred when performing a move instruction (MOV or
PUSH) from one of the accumulators (AxH, AxL, BxL or BxH) through the data bus or if a limitation occurred when the LIM
(TBD) instruction was executed. Otherwise, it is not affected.
The limit flag is cleared during processor reset.
The limit flag can be modified by writing to ST0.
R: Rn Register is Zero
This flag is affected by the MODR and NORM instructions. The R flag is set if the result of the Rn modification operation
(Rn; Rn + 1; Rn - 1; Rn + S) is zero; cleared otherwise. The R flag status is latched until one of the above instructions is
used.
The R flag is cleared during processor reset.
The R flag can be modified by writing to ST0.
IM1, IM0: Interrupt 0 Mask, Interrupt 1 Mask
IM0 – Interrupt mask for INT0
IM1 – Interrupt mask for INT1
Clear – Disable the specific interrupt.
Set – Enable the specific interrupt.
The interrupt mask bits are cleared during processor reset. The interrupt mask bits can be modified by writing to ST0.
IE: Interrupt Enable
Clear – Disable all maskable interrupts.
Set – Enable all maskable interrupts.
The interrupt enable bit is cleared during processor reset. The interrupt enable bit can be modified by the instructions EINT
(enable interrupts) and DINT (disable interrupts) by using RETI/RETID for returning from one of the maskable interrupt ser-
vice routines or by writing to ST0.
SAT: Saturation Mode
Clear – Enable the saturation when transferring the contents of the accumulator onto the data bus.
Set – Disable the saturation mode.
Note that this bit has no effect on the LIM instruction.
The saturation enable bit is cleared during processor reset.
The saturation enable bit can be modified by writing to ST0.
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