參數(shù)資料
型號(hào): AT43USB353M-AC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Low Cost Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
中文描述: 8-BIT, MROM, 24 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026BBC, LQFP-48
文件頁(yè)數(shù): 82/95頁(yè)
文件大小: 568K
代理商: AT43USB353M-AC
82
AT43USB353M
3307B–USB–4/04
Global Resume
Global resume is signaled by a J to K state change on Port0. The USB hardware enables the
oscillator/PLL, propagates the RESUME signaling, and sets the RSM bit of the SPRSR, which
generates an interrupt. The microcontroller starts executing where it left off and services the
interrupt. As part of the ISR, the firmware clears the GLB_SUSP bit.
Remote Wakeup
While the AT43USB353M is in global suspend, resume signaling is also possible through
remote wakeup if the remote wakeup feature is enabled. Remote wakeup is defined as a port
connect, port disconnect or resume signaling received at a downstream port or, in case of the
embedded function, through an external interrupt.
A remote wakeup initiated at a downstream port is similar in many respects to a global
resume. The USB hardware enables the oscillator/PLL, propagates the RESUME signaling,
and sets the RSM bit of the SPRSR which generates an interrupt. The microcontroller starts
executing where it left off and services the interrupt. As part of the ISR, the firmware clears the
GLB_SUSP bit.
A remote wakeup from the embedded function is initiated through INT0 or the external inter-
rupt, INT1, which enables the oscillator/PLL and the USB hardware. The USB hardware drives
RESUME signaling and sets the FRMWUP and RSM bits of SPRSR which generates an inter-
rupt to the microcontroller. The microcontroller starts executing where it left off and services
the interrupt. As part of the ISR, the firmware clears the GLB SUSP bit.
At completion of RESUME signaling, the USB hardware sets the Port Suspend Status Change
bits of the Hub Port Status Change Registers.
Selective Suspend
and Resume
See section on Hub Port Control Register, HPCON.
Suspend and Resume
Process
Global Suspend
The Host stops sending packets, the hardware detects this as global suspend signaling and
stops all downstream signaling. Finally, the hardware asserts the GLB_SUSP interrupt.
Hardware
Firmware
1.Host stops sending packets
2.
Global suspend signaling detected
3.
Stop downstream signaling
Set GBL SUS bit
interrupt
4.
5.
Shut down any peripheral activity
6.
Set Sleep Enable and Sleep Mode bits
of MCUCR
Set GPIO to low power state if required
7.
8.
Set UOVCER bit 2
9.
Execute SLEEP instruction
10. SLEEP bit detected
11. Shut off oscillator
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