參數(shù)資料
型號: AT43USB353M-AC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Low Cost Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
中文描述: 8-BIT, MROM, 24 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 19/95頁
文件大?。?/td> 568K
代理商: AT43USB353M-AC
19
AT43USB353M
3307B–USB–4/04
address $000 must be a JMP instruction to the reset handling routine. If the program never
enables an interrupt source, the interrupt vectors are not used, and regular program code can
be placed at these locations. The circuit diagram in Figure 6 shows the reset logic.
Figure 6.
Reset Logic
Power-on Reset
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. An internal
timer clocked from the Watchdog timer oscillator prevents the MCU from starting until after a
certain period after V
CC
has reached the power-on threshold voltage, regardless of the V
CC
rise time.
If the build-in start-up delay is sufficient, RESETN can be connected to V
CC
directly or via an
external pull-up resistor. By holding the pin low for a period after V
CC
has been applied, the
Power-on Reset period can be extended.
External Reset
An external reset is generated by a low-level on the RESETN pin. Reset pulses longer than
200 ns will generate a reset. Shorter pulses are not guaranteed to generate a reset. When the
applied signal reaches the Reset Threshold Voltage - V
RST
on its positive edge, the delay timer
starts the MCU after the Time-out period t
TOUT
has expired.
Figure 7.
External Reset During Operation
FSTRT
Cntr Reset
USB Reset
OR
POR Ckt
Reset Ckt
Watchdog Timer
Divider
14-bit Cntr
VCC
RSTN
1 MHz Clock
S
R
ON
t
TOUT
V
RST
VCC
RESET
TIME-OUT
INTERNAL
RESET
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