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參數(shù)資料
| 型號(hào)： | AS7C513C |
| 廠(chǎng)商： | Alliance Semiconductor Corporation |
| 英文描述： | 5 V 32K X 16 CMOS SRAM |
| 中文描述： | 5伏32K的× 16 CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 145K |
| 代理商： | AS7C513C |
AS7C513C
12/5/06, v 1.0
Alliance Memory
P. 5 of 9
Write waveform 1 (WE controlled)
11
Write cycle (over the operating range)
11
Parameter
Symbol
t
WC
t
CW
t
AW
t
AS
t
WP
WR
t
AH
t
DW
t
DH
t
WZ
t
OW
t
BW
AS7C513C-12
Min
12
9
9
0
9
0
0
7
0
–
1
9
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Max
–
–
–
–
–
–
–
–
–
6
–
–
Write cycle time
Chip enable (CE) to write end
Address setup to write end
Address setup time
Write pulse width
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
Byte select low to end of write
5
4, 5
4, 5
Address
CE
LB, UB
WE
Data
IN
Data
OUT
t
WC
t
CW
t
BW
t
AW
t
AS
t
WP
t
DW
t
DH
t
OW
t
WZ
t
WR
Data undefined
high Z
Data valid
t
AH
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