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參數(shù)資料
| 型號： | AS7C513C |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 5 V 32K X 16 CMOS SRAM |
| 中文描述： | 5伏32K的× 16 CMOS SRAM的 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 145K |
| 代理商： | AS7C513C |
AS7C513C
12/5/06, v 1.0
Alliance Memory
P. 2 of 9
Functional description
The AS7C513C is a 5V high-performance CMOS 524,288-bit Static Random Access Memory (SRAM) device organized as
32,768 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are
desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 12 ns with output enable access times (t
OE
) of 6 ns are ideal for high-
performance applications.
When CE is high, the device enters standby mode. If inputs are still toggling, the device will consume I
SB
power. If the bus is
static, then full standby power is reached (I
SB1
).
A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15
is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should
drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and chip enable (CE) with write enable (WE) high. The chip
drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive or
write enable is active, output drivers stay in high-impedance mode.
The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be
written and read. LB controls the lower bits, I/O0 through I/O7, and UB controls the higher bits, I/O8 through I/O15.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5 V supply. The AS7C513C is packaged in
common industry standard packages.
Note:
Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key:
H = high, L = low, X = don’t care.
Absolute maximum ratings
Parameter
Symbol
V
t1
V
t2
P
D
T
stg
T
bias
I
OUT
Min
–0.50
–0.50
–
–55
–55
–
Max
+7.0
Unit
V
V
W
°
C
°
C
mA
Voltage on V
CC
relative to GND
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with VCC applied
DC current into outputs (low)
V
CC
+0.50
1.25
+125
+125
50
CE
H
L
L
L
L
L
L
L
L
WE
X
H
H
H
L
L
L
H
X
OE
X
L
L
L
X
X
X
H
X
LB
X
L
H
L
L
L
H
X
H
UB
X
H
L
L
L
H
L
X
H
I/O0–I/O7
High Z
D
OUT
High Z
D
OUT
D
IN
D
IN
High Z
I/O8–I/O15
High Z
High Z
D
OUT
D
OUT
D
IN
High Z
D
IN
Mode
Standby (I
SB
), I
SBI
)
Read I/O0–I/O7 (I
CC
)
Read I/O8–I/O15 (I
CC)
Read I/O0–I/O15 (I
CC
)
Write I/O0–I/O15 (I
CC
)
Write I/O0–I/O7 (I
CC
)
Write I/O8–I/O15 (I
CC
)
High Z
High Z
Output disable (I
CC
)
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