參數(shù)資料
型號(hào): AS7C25512PFS32A-225BC
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 512K X 32 STANDARD SRAM, 6.9 ns, PBGA165
封裝: BGA-165
文件頁(yè)數(shù): 17/21頁(yè)
文件大?。?/td> 458K
代理商: AS7C25512PFS32A-225BC
12/2/02, v. 0.9.1
Alliance Semiconductor
5 of 21
AS7C25512PFS32A
AS7C25512PFS36A
Burst sequence table
Synchronous truth table
Interleaved burst address
Linear burst address
A1 A0
1st Address
0 00 11 01 1
1st Address
0 00 11 01 1
2nd Address
0 10 01 11 0
2nd Address
0 11 01 10 0
3rd Address
1 01 10 00 1
3rd Address
1 01 10 00 1
4th Address
1 11 00 10 0
4th Address
1 11 00 11 0
CE01
1
X = don’t care, L = low, H = high
CE1
CE2
ADSP
ADSC
ADV
BWn
2
2
OE
Address accessed
CLK
Operation
DQ
H
X
L
X
NA
L to H
Deselect
Hi
Z
L
X
L
X
NA
L to H
Deselect
Hi
Z
L
X
H
L
X
NA
L to H
Deselect
Hi
Z
L
X
H
L
X
NA
L to H
Deselect
Hi
Z
L
X
H
L
X
NA
L to H
Deselect
Hi
Z
L
H
L
X
L
External
L to H
Begin read
Hi
Z3
3
Q in flow-through mode.
L
H
L
X
H
External
L to H
Begin read
Hi
Z
L
H
L
H
L
X
F
L
External
L to H
Begin read
Hi
Z3
L
H
L
H
L
X
F
H
External
L to H
Begin read
Hi
Z
X
H
L
F
L
Next
L to H
Continue read
Q
X
H
L
F
H
Next
L to H
Continue read
Hi
Z
X
H
F
L
Current
L to H
Suspend read
Q
X
H
F
H
Current
L to H
Suspend read
Hi
Z
H
XXX
H
L
F
L
Next
L to H
Continue read
Q
H
XXX
H
L
F
H
Next
L to H
Continue read
Hi
Z
H
X
H
F
L
Current
L to H
Suspend read
Q
H
X
H
F
H
Current
L to H
Suspend read
Hi
Z
L
H
L
H
L
X
T
X
External
L to H
Begin write
D4
4
For write operation following a READ,
OE must be high before the input data set up time and held high throughout the input hold time
X
H
L
T
X
Next
L to H
Continue write
D
H
XXX
H
L
T
X
Next
L to H
Continue write
D
X
H
T
X
Current
L to H
Suspend write
D
H
XXX
H
T
X
Current
L to H
Suspend write
D
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