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參數(shù)資料
| 型號(hào)： | AS4C4M4E1Q |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 4M × 4 CMOS QuadCAS DRAM(EDO) Family(4M × 4 CMOS QuadCAS動(dòng)態(tài)RAM（擴(kuò)展數(shù)據(jù)總線）) |
| 中文描述： | 4米× 4的CMOS QuadCAS的DRAM（江戶）家庭（4米× 4的CMOS QuadCAS動(dòng)態(tài)隨機(jī)存儲(chǔ)器（擴(kuò)展數(shù)據(jù)總線）） |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大小： | 384K |
| 代理商： | AS4C4M4E1Q |
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Copyright 1999 Alliance Semiconductor. All rights reserved.
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Organization: 4,194,304 words × 4 bits
High speed
- 50/60 ns RAS access time
- 25/30 ns column address access time
- 12/15 ns CAS access time
Low power consumption
- Active: 495 mW max
- Standby:5.5 mW max, CMOS I/O
Extended data out
Refresh
- 4096 refresh cycles, 64 ms refresh interval for
4C4M4EOQ
- 2048 refresh cycles, 32 ms refresh interval for
AS4C4M4E1Q
- RAS-only and hidden refresh or CAS-before-RAS refresh
or self-refresh
TTL-compatible
4 separate CAS pins allow for separate I/O operation
JEDEC standard package
- 300 mil, 28-pin SOJ
- 300 mil, 28-pin TSOP
5V power supply
Latch-up current
≥
200 mA
ESD protection
≥
2000 mV
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#
DUUDQJHPHQW
A8
A7
A6
A5
A4
GND
A10
A0
A1
A2
A3
V
CC
GND
I/O3
I/O2
CAS3
OE
A9
CAS2
NC
V
CC
I/O0
I/O1
WE
RAS
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
*NC/A11
CAS0
CAS1
9
10
11
12
13
14
20
19
18
17
16
15
SOJ
A
A8
A7
A6
A5
A4
GND
A10
A0
A1
A2
A3
V
CC
GND
I/O3
I/O2
CAS3
OE
A9
CAS2
V
CC
I/O0
I/O1
WE
RAS
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
*NC/A11
CAS0
CAS1
9
10
11
12
13
14
20
19
18
17
16
15
TSOP
A
* NC on 2K refresh version; A11 on 4K refresh version
NC
3LQ
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Pin(s)
A0 to A11
RAS
CAS
WE
I/O0 to I/O3
OE
V
CC
GND
NC
Description
Address inputs
Row address strobe
Column address strobe
Write enable
Input/output
Output enable
Power
Ground
No Connection
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#
JXLGH
Symbol
t
RAC
t
CAA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC5
4C4M4EOQ/E1Q-50
50
25
12
13
85
20
110
1.0
4C4M4EOQ/E1-60
60
30
15
15
100
24
100
1.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum hyper page mode cycle time
Maximum operating current
Maximum CMOS standby current
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS4C4M4EOQ | 4M × 4 CMOS QuadCAS DRAM(EDO) Family(4M × 4 CMOS QuadCAS動(dòng)態(tài)RAM（擴(kuò)展數(shù)據(jù)總線）) |
| AS4C4M4F0 | 5V 4M×4 CMOS DRAM （Fast Page Mode)(5V 4M×4 CMOS 動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
| AS4C4M4F1 | 5V 4M×4 CMOS DRAM （Fast Page Mode)(5V 4M×4 CMOS 動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
| AS4C4M4F1Q | 5V 4M×4 CMOS QuadCAS DRAM （Fast Page Mode)(5V 4M×4 CMOS QuadCAS 動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
| AS4C4M4FOQ | 5V 4M×4 CMOS QuadCAS DRAM （Fast Page Mode)(5V 4M×4 CMOS QuadCAS 動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS4C4M4EOQ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:4M x 4 CMOS QuadCAS DRAM (EDO) family |
| AS4C4M4F0 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:5V 4M x 4 CMOS DRAM (Fast Page mode) |
| AS4C4M4F0-50 | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:5V 4M×4 CMOS DRAM (Fast Page mode) |
| AS4C4M4F0-50JC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x4 Fast Page Mode DRAM |
| AS4C4M4F0-50JI | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x4 Fast Page Mode DRAM |
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