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參數(shù)資料
| 型號： | AP87C54-20 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16 KBYTES USER PROGRAMMABLE EPROM |
| 中文描述： | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 290K |
| 代理商： | AP87C54-20 |
AUTOMOTIVE 87C54/87C54-20
EXTERNAL MEMORY CHARACTERISTICS
(Continued)
12 MHz Oscillator
Variable Oscillator
Symbol
Parameter
87C54/87C54-20
Units
Min
Max
Min
Max
T
RLRH
RD Pulse Width
400
6 T
CLCL
b
100
ns
T
WLWH
WR Pulse Width
400
6 T
CLCL
b
100
ns
T
RLDV
RD Low to Valid
Data In
252
5 T
CLCL
b
165/
5 T
CLCL
95
*
ns
T
RHDX
Data Hold After RD
High
0
0
ns
T
RHDZ
Data Float After RD
High
107
2 T
CLCL
b
60
ns
T
LLDV
ALE Low to Valid
Data In
517
8 T
CLCL
b
150/
8 T
CLCL
b
90
*
ns
T
AVDV
Address Valid to
Valid Data In
585
9 T
CLCL
b
165/
9 T
CLCL
b
90
*
ns
T
LLWL
ALE Low to RD or
WR Low
200
300
3 T
CLCL
b
50
3 T
CLCL
a
50
ns
T
AVWL
Address Valid to
WR Low
203
4 T
CLCL
b
130/
4 T
CLCL
b
90
*
ns
T
QVWX
Data Valid before
WR Low
33
T
CLCL
b
50/
T
CLCL
b
35
*
ns
T
WHQX
Data Hold after WR
High
33
T
CLCL
b
50/
T
CLCL
b
40
*
ns
T
QVWH
Data Valid to WR
High
433
7 T
CLCL
b
150/
7 T
CLCL
b
70
*
ns
T
RLAZ
RD Low to Address
Float
0
0
ns
T
WHLH
RD or WR High to
ALE High
43
123
T
CLCL
b
40
T
CLCL
a
40
ns
NOTE:
*
Timings speicified for the 87C54-20 are valid at 20 MHz only. For timings below 20 MHz, use the 87C54 timings.
11
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