- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄364677 > AN1759 (飛思卡爾半導(dǎo)體(中國)有限公司) Add a Non-Volatile Clock to the MC68HC705J1A PDF資料下載
參數(shù)資料
| 型號(hào)： | AN1759 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Add a Non-Volatile Clock to the MC68HC705J1A |
| 中文描述： | 添加非易失時(shí)鐘的MC68HC705J1A |
| 文件頁數(shù)： | 6/24頁 |
| 文件大小： | 316K |
| 代理商： | AN1759 |
Application Note
AN1759
6
Figure 3. 2-Wire Serial Bus Interface
Bus Idle
In idle mode, both the SDA and SCL are held high.
Start Transfer
All transfers begin with the start transfer condition. This is done by
bringing the SDA pin from HIGH to LOW while the SCL pin is HIGH. The
DS1307 is monitoring the bus for this signal and will not start any
transactions until this condition is met. See
Figure 4
.
Stop Transfer
All transfers must be terminated with the stop transfer condition. This is
done by bringing the SDA pin from LOW to HIGH while the SCL pin is
HIGH. A stop transfer can be used only after the transmitting device
releases the bus. See
Figure 4
.
+5 V
DS1307 2-WIRE PORT
RX
TX
5 k
RX
TX
PORT PIN
DIRECTION
BUS MASTER
TX
RX
SCL
SDA
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AN1768 | ADMISSIBLE AVALANCHE POWER OF SCHOTTKY DIODES |
| AN1775 | Expanding Digital Input with an A/D Converter |
| AN1816 | USING THE HC912B32 TO IMPLEMENT THE DISTRIBUTED SYSTEMS INTERFACE (DSI) PROTOCOL |
| AN2104 | Using Background Debug Mode for the M68HC12 Family |
| AN2154FAP | TV/Video Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AN175C25A | 制造商:NEW SURPLUS HARDWARE 功能描述: |
| AN176-20A | 制造商:AN# - MILITARY 功能描述: |
| AN176-40 | 制造商:AN# - MILITARY 功能描述: |
| AN1768 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ADMISSIBLE AVALANCHE POWER OF SCHOTTKY DIODES |
| AN176H22A | 制造商:NEW SURPLUS HARDWARE 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。