
Chapter 4
Registers
263
24674
Rev. 3.00
April 2003
AMD-8111 HyperTransport I/O Hub Data Sheet
AMD Preliminary Information
12
S12BIT1. Bit 1 of slot 12
. Display bit 1 of the most recent slot 12 from modem codec.
11
SRINT. Secondary Resume Interrupt
. Read-write. This bit indicates that a resume event occurred
on ACSDI[1]. 1 = Resume event occurred. Cleared by writing a 1 to this bit position.
PRINT. Primary Resume Interrupt
. Read-write. This bit indicates that a resume event occurred on
ACSDI[0]. 1 = Resume event occurred. Cleared by writing a 1 to this bit position.
SCRDY. Secondary Codec Ready
. Read-only. Re
fl
ects the state of the codec ready bit in ACSDI[1].
Bus masters ignore the condition of the codec ready bits. Software must check this bit before starting
the bus masters. This bit is cleared with assertion of GLOB_CNT[SHUTOFF]. This bit is also cleared
when ACCLK is detected to not be operating adequately.
PCRDY. Primary Codec Ready
. Read-only. Re
fl
ects the state of the codec ready bit in ACSDI[0]. Bus
masters ignore the condition of the codec ready bits. Software must check this bit before starting the
bus masters. This bit is cleared with assertion of AC2C[SHUTOFF]. This bit is also cleared when
ACCLK is detected to not be operating adequately.
MICINT. Mic In Interrupt
. Read-only. This bit indicates that one of the Mic in channel interrupts
occurred. 1 = Interrupt occurred. When the speci
fi
c interrupt is cleared, this bit is cleared
automatically.
POINT. PCM Out Interrupt
. Read-only. This bit indicates that one of the PCM out channel interrupts
occurred. 1 = Interrupt occurred. When the speci
fi
c interrupt is cleared, this bit is cleared
automatically.
PIINT. PCM In Interrupt
. Read-only. This bit indicates that one of the PCM in channel interrupts
occurred. 1 = Interrupt occurred. When the speci
fi
c interrupt is cleared, this bit is cleared
automatically.
Reserved
Reserved
MOINT. Modem Out Interrupt
. Read-only. This bit indicates that one of the modem out channel
interrupts occurred. 1 = Interrupt occurred. When the speci
fi
c interrupt is cleared, this bit is cleared
automatically.
MIINT. Modem In Interrupt
. Read-only. This bit indicates that one of the modem in channel interrupts
occurred. 1 = Interrupt occurred. When the speci
fi
c interrupt is cleared, this bit is cleared
automatically.
GPIINT. GPI Status Change Interrupt
. Read-write. This bit is set whenever bit 0 of slot 12 is set. This
happens when the value of any of the GPIOs currently de
fi
ned as inputs changes.
If
‘
1
’
this bit sets also PM20[AC97_STS].
1 = Input changed. This bit is cleared by writing a 1 to this bit position.
10
9
8
7
6
5
4
3
2
1
0
Bits
Description (Continued)