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參數(shù)資料
| 型號(hào)： | AMC6821SDBQR |
| 英文描述： | Analog Monitor and Control Circuit |
| 中文描述： | 模擬監(jiān)視和控制電路 |
| 文件頁數(shù)： | 7/47頁 |
| 文件大?。?/td> | 547K |
| 代理商： | AMC6821SDBQR |
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AMC6821
SBAS386A–MAY 2006–REVISED MAY 2006
Write Multiple Bytes
S
SLAVE ADDRESS
WR
ACK
COMMAND
ACK
DATA
ACK
DATA
ACK
7-bit AMC6821 slave
address
8-bit register address of
first register to be written
First 8-bit data written
first register
Second 8-bit data written
second register
DATA
ACK
...
DATA
ACK
P
Third 8-bit data written third register
Last 8-bit data
S = start condition; P = stop condition; shaded = slave to master; unshaded = master to slave; WR = write (bit value of 0).
The first register is the one to which the first data byte is written. The next register is the second register. If the
bus master continues to transfer data into the AMC6821 after writing the last location, all data are ignored until
the operation stops.
Read Byte
S
SLAVE ADDRESS
WR
ACK
COMMAND
ACK
Sr
SLAVE ADDRESS
RD
ACK
DATA
NACK
P
7-bit AMC6821 slave
address
7-bit AMC6821 slave
address
8-bit data from
register
8-bit register address
S = start condition; P = stop condition; shaded = slave to master; unshaded = master to slave; WR = write (bit value of 0); RD = read (bit value of 1);
NACK = not acknowledged; Sr = repeated start condition.
Read Multiple Bytes
S
SLAVE ADDRESS
WR
ACK
COMMAND
ACK
Sr
SLAVE ADDRESS
RD
ACK
DATA
ACK
7-bit AMC6821 slave
address
Address of first
register to be read
7-bit AMC6821 slave
address
8-bit data from first
register
DATA
ACK
...
DATA
NACK
P
8-bit data from second register
Last 8-bit data
S = start condition; P = stop condition; shaded = slave to master; unshaded = master to slave; WR = write (bit value of 0); RD = read (bit value of 1);
NACK = not acknowledged; Sr = repeated start condition.
The first register is the one from which the first data byte is transmitted. The next register is the second register.
If the bus master continues clocking data out after reading the last location (0x3F), the value
0x00
is sent out
until the operation stops.
The AMC6821 is entirely controlled by the registers. All registers are 8-bit. The AMC6821 has an address
pointer register; the value of the address pointer register determines which register. To write data to the device
register or read data from it, the address pointer register must be set properly. Data can then be written into or
read from that register. The command issued by the bus master always contains the initial value of the address
pointer register. The command is constructed as shown in
Table 2
.
Table 2. Command Format
(1)
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
0
0
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
(1)
ADDR[5:0] is the address of the register that is accessed first. The register address is stored in the address pointer register.
In the send byte operation, the bus master writes the address of a specified device register into the address
pointer register.
In the receive byte operation, the bus master reads the data back from the device register addressed by the
address point register.
In the write byte operation, the bus master sets the address pointer register to the address of a specified device
register, then writes 8-bit data into it. In the read byte operation, the SMBus master sets the address pointer
register to the address of a specified device register first, then reads 8-bit data back from it.
7
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