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Normal Fan Speed Control
TACH Setting
Register
DCY
Adjustment
Fan Speed
Counter
+V
TACH
PWM-Out
+V
TACH Data
AMC6821
+
-
PWM
Control
The PWM duty cycle increases if the ACH data is above
the setting value, decreases if the TACH data is below
the setting, and does not change if the TACH data is
equal to the setting (with a tolerance of 0x000A).
AMC6821
SBAS386A–MAY 2006–REVISED MAY 2006
The fan speed is controlled by four different modes:
software DCY control;
software RPM control,
auto remote temperature fan control;
maximum fast-speed calculated control.
Bits FDRC1 and FDRC0 in
Configuration Register 1
determine the operation mode.
Software DCY Control Mode
When the bits [FDRC1:FDRC0] = [00] the fan works in the software DCY control mode. The host writes the
desired duty cycle value corresponding to the required RPM into the DCY register. In this mode, if the TACH
measurement is enabled (bit 2 of 0x01 = 1) and the TACH-MODE bit (bit 1 of 0x01) is cleared ('0'), the duty
cycle from the POW-OUT pin is forced to 0% when the value in the DCY register is less than 7%. However, if
the TACH measurement is disabled (bit 2 of 0x01 is cleared) or the TACH mode is set ('1'), the DCY register
always keeps the programmed value written by the host and is not forced to '0' even when the programmed
value is less than 7%.
Software-RPM Control Mode
This mode is used to maintain the fan at a fixed target speed. It works only when the TACH measurement is
enabled (bit 2 of 0x02 = 1). When the bits [FDRC1:FDRC0] = [01] the fan works in the software RPM control
mode, as shown in
Figure 16
. The host writes the proper value into the
TACH Setting Register
to set the target
fan speed. The actual fan speed is monitored by an on-chip fan speed counter, and the result is stored in the
TACH-DATA Register
(refer to the
Fan Speed Measurement
section for more details). The actual speed is
compared with the setting value. If there is a difference, the duty cycle is adjusted.
Figure 16. Software RPM Control
The monitoring and adjustment is made once every second, or once every 250ms, as determined by the
TACH-FAST bit of
Configuration Register 4
(bit 5, 0x04). Bits [STEP1:STEP0] of the
DCY-RAMP Register
define
the allowed amount of each adjustment. When the difference between the values of the
TACH-DATA
and
TACH
Setting
Registers are equal to or less than 0x000A, the adjustment finishes. 0x000A corresponds to about 1.8%
tolerance for 10000RPMs, or 0.9% for 5000RPMs. This measurement architecture is illustrated in
Figure 17
.
In practice, the selected target speed must be not too low to operate the fan. When the TACH-MODE bit (bit 1 of
0x02) is cleared ('0'), the duty cycle of PWM-Out is forced to 30% when the calculated desired value of duty
cycle is less than 30%. Therefore, the TACH setting must be not greater than the value corresponding to the
RPM for 30% duty cycle. When TACH mode is equal to '1', the TACH setting must not be greater than the value
corresponding to the allowed minimum RPM at which the fan runs properly.
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