- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C972BKCW (ADVANCED MICRO DEVICES INC) PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support PDF資料下載
參數(shù)資料
| 型號(hào)： | AM79C972BKCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| 中文描述： | 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 63/130頁(yè) |
| 文件大?。?/td> | 1580K |
| 代理商： | AM79C972BKCW |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)當(dāng)前第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)
Am79C972
63
byte ordering is such that the first byte received from
the network (after the SFD) must match the least signif-
icant byte of CSR12 (PADR[7:0]), and the sixth byte re-
ceived must match the most significant byte of CSR14
(PADR[47:40]).
When DRCVPA (CSR15, bit 13) is set to 1, the
Am79C972 controller will not accept unicast frames.
If the incoming frame is multicast, the Am79C972 con-
troller performs a calculation on the contents of the
destination address field to determine whether or not to
accept the frame. This calculation is explained in the
section that describes the Logical Address Filter
(LADRF).
When all bits of the LADRF registers are 0, no multicast
frames are accepted, except for broadcast frames.
Although broadcast frames are classified as special
multicast frames, they are treated differently by the
Am79C972 controller hardware. Broadcast frames are
always accepted, except when DRCVBC (CSR15, bit
14) is set and there is no Logical Address match.
None of the address filtering described above applies
when the Am79C972 controller is operating in the pro-
miscuous mode. In the promiscuous mode, all properly
formed packets are received, regardless of the con-
tents of their destination address fields. The promiscu-
ous mode overrides the Disable Receive Broadcast bit
(DRCVBC bit l4 in the MODE register) and the Disable
Receive Physical Address bit (DRCVPA, CSR15, bit
13).
The Am79C972 controller operates in promiscuous
mode when PROM (CSR15, bit 15) is set.
In addition, the Am79C972 controller provides the Ex-
ternal Address Detection Interface (EADI) to allow ex-
ternal address filtering. See the section
External
Address Detection Interface
for further detail.
The receive descriptor entry RMD1 contains three bits
that indicate which method of address matching
caused the Am79C972 controller to accept the frame.
Note that these indicator bits are only available when
the Am79C972 controller is programmed to use 32-bit
structures for the descriptor entries (BCR20, bit 7-0,
SWSTYLE is set to 2 or 3).
PAM (RMD1, bit 22) is set by the Am79C972 controller
when it accepted the received frame due to a match of
the frame
’
s destination address with the content of the
physical address register.
LAFM (RMD1, bit 21) is set by the Am79C972 control-
ler when it accepted the received frame based on the
value in the logical address filter register.
BAM (RMD1, bit 20) is set by the Am79C972 controller
when it accepted the received frame because the
frame
’
s destination address is of the type
’
Broadcast
’
.
If DRCVBC (CSR15, bit 14) is cleared to 0, only BAM,
but not LAFM will be set when a Broadcast frame is re-
ceived, even if the Logical Address Filter is pro-
grammed in such a way that a Broadcast frame would
pass the hash filter. If DRCVBC is set to 1 and the Log-
ical Address Filter is programmed in such a way that a
Broadcast frame would pass the hash filter, LAFM will
be set on the reception of a Broadcast frame.
When the Am79C972 controller operates in promiscu-
ous mode and none of the three match bits is set, it is
an indication that the Am79C972 controller only ac-
cepted the frame because it was in promiscuous mode.
When the Am79C972 controller is not programmed to
be in promiscuous mode, but the EADI interface is en-
abled, then when none of the three match bits is set, it
is an indication that the Am79C972 controller only ac-
cepted the frame because it was not rejected by driving
the EAR pin LOW within 64 bytes after SFD.
See Table 6 for receive address matches.
Table 6.
Receive Address Match
Automatic Pad Stripping
During reception of an IEEE 802.3 frame, the pad field
can be stripped automatically. Setting ASTRP_RCV
(CSR4, bit 0) to 1 enables the automatic pad stripping
feature. The pad field will be stripped before the frame
is passed to the FIFO, thus preserving FIFO space for
additional frames. The FCS field will also be stripped,
since it is computed at the transmitting station based on
the data and pad field characters, and will be invalid for
a receive frame that has had the pad characters
stripped.
The number of bytes to be stripped is calculated from
the embedded length field (as defined in the ISO 8802-
3 (IEEE/ANSI 802.3) definition) contained in the frame.
The length indicates the actual number of LLC data
bytes contained in the message. Any received frame
which contains a length field less than 46 bytes will have
the pad field stripped (if ASTRP_RCV is set). Receive
PAM
LAF
M
BAM
DRC
VBC
Comment
0
0
0
X
Frame accepted due to
PROM = 1 or no EADI
reject
Physical address match
Logical address filter
match;
frame is not of type
broadcast
Logical address filter
match;
frame can be of type
broadcast
Broadcast frame
1
0
0
X
0
1
0
0
0
1
0
1
0
0
1
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C972BKIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972 | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C974 | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C972BKD/W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKD\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVC | 制造商:Advanced Micro Devices 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。