參數(shù)資料
型號(hào)： AM79C961AKCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝： PLASTIC, QFP-132
文件頁(yè)數(shù)： 46/85頁(yè)
文件大?。?/td> 1088K
代理商： AM79C961AKCW
46
Am79C961A
P R E L I M I N A R Y
DMA Channel Configuration
DETAILED FUNCTIONS
EEPROM
Interface
The EEPROM supported by the PCnet-ISA II controller
is an industry standard 93C56 2-Kbit EEPROM device
which uses a 4-wire interface. This device directly inter-
faces to the PCnet-ISA II controller through a 4-wire
interface which uses 3 of the private data bus pins for
Data In, Data Out, and Serial Clock. The Chip Select
pin is a dedicated pin from the PCnet-ISA II controller.
Note
: All data stored in the EEPROM is stored in
bit-reversal format. Each word (16 bits) must be written
into the EEPROM with bit 15 swapped with bit 0, bit 14
swapped with bit 1, etc.
This is a 2-Kbit device organized as 128 x 16 bit words.
A map of the device as used in the PCnet-ISA II con-
troller is below. The information stored in the EEPROM
is as follows:
Important Note About The EEPROM
Byte Map
The user is cautioned that while the Am79C961A
(PCnet-ISA II) and its associated EEPROM are pin
compatible to their predecessors the Am79C961
(PCnet-ISA
+
) and its associated EEPROM, the byte
map structure in each of the EEPROMs are different
from each other.
The EEPROM byte map structure used for the
Am79C961A PCnet-ISA II has the addition of “MISC
Config 2, ISACSR9" at word location 10Hex. The
EEPROM byte map structure used for the Am79C961
PCnet-ISA+ does not have this.
Therefore, should the user intend to replace the
PCnet-ISA
+
with the PCnet-ISA II, care
MUST
be taken
to reprogram the EEPROM to reflect the new byte map
structure needed and used by the PCnet-ISA II. For
additional information, refer to the Am79C961
PCnet-ISA
+
data sheet (PID #18183) under the sec-
tions entitled EEPROMand Serial EEPROM Byte Map
I/O port base address
bits[07:00] descriptor 0
0x61
Read/write value indicating the selected I/O lower limit address bits[07:00] for
I/O descriptor 0.
Name
Register
Index
Definition
Interrupt request level
select 0
0x70
Read/write value indicating selected interrupt level. Bits[3:0] select which interrupt
level used for Interrupt 0. One selects IRQL 1, fifteen selects IRQL fifteen. IRQL 0 is
not a valid interrupt selection and represents no interrupt selection.
Interrupt request type
select 0
0x71
Read/write value indicating which type of interrupt is used for the Request Level
selected above.
Bit[1] : Level,
1 = high, 0 = low
Bit[0] : Type,
1 = level, 0 = edge
The PCnet-ISA II controller only supports Edge High and Level Low Interrupts.
Name
Register
Index
Definition
Name
Register
Index
Definition
DMA channel select 0
0x74
Read/write value indicating selected DMA channels. Bits[2:0] select which DMA
channel is in use for DMA 0. Zero selects DMA channel 0, seven selects DMA channel
7. DMA channel 4, the cascade channel is used to indicate no DMA channel is active.
DMA channel select 1
0x75
Read only with a value of 0x04.
IEEE address 6 bytes
Reserved10 bytes
EISA ID4 bytes
ISACSRs14 bytes
Plug and Play Defaults19 bytes
8-Bit Checksum1 byte
External Shift Chain2 bytes
Plug and Play Config Info192 bytes
相關(guān)PDF資料
PDF描述
AM79C961AKC PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961A PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKIW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AVCW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
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