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參數(shù)資料
| 型號(hào)： | AM79C961A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| 中文描述： | PCnet⑩- 2跳線的ISA，全雙工單芯片以太網(wǎng)控制器為ISA |
| 文件頁數(shù)： | 45/85頁 |
| 文件大小： | 1088K |
| 代理商： | AM79C961A |
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Am79C961A
45
P R E L I M I N A R Y
Plug and Play Logical Device
Configuration Registers
The PCnet-ISA II controller supports a subset of the
defined Plug and Play logical device control registers.
The reason for only supporting a subset of the registers
is that the PCnet-ISA II controller does not require as
many system resources as Plug and Play allows. For
instance, Memory Descriptor 2 is not used, as the
PCnet-ISA II controller only requires two memory
descriptors, one for the Boot PROM/Flash, and one for
the SRAM in Shared Memory Mode.
Plug and Play Logical Device Control Registers
Memory Space Configuration
I/O Space ConfigurationI/O Interrupt Configuration
Name
Activate
Address
Port Value
0x30
Definition
For each logical device there is one activate register that controls whether or
not the logical device is active on the ISA bus. Bit[0], if set, activates the logical
device. Bits[7:1] are reserved and must be zero. This is a read/write register.
Before a logical device is activated, I/O range check must be disabled.
This register is used to perform a conflict check on the I/O port range
programmed for use by a logical device.
Bit[7:2] Reserved
Bit 1[1] Enable I/O Range check, if set then I/O Range Check is enabled. I/O
range check is only valid when the logical device is inactive.
Bit[0], if set, forces the logical device to respond to I/O reads of the logical
device’s assigned I/O range with a 0x55 when I/O range check is in operation.
If clear, the logical device drives 0xAA. This register is read/write.
I/O Range Check
0x31
Name
Memory base address
bits[23:16] descriptor 0
Memory base address
bits [23:16] descriptor 0
Memory control
Register
Index
0x40
Definition
Read/write value indicating the selected memory base address bits[23:16] for
memory descriptor 0. This is the Boot Prom Space.
Read/write value indicating the selected memory base address bits[15:08] for
memory descriptor 0.
Bit[1]
specifies 8/16-bit control. The encoding
relates
to memory control
(bits[4:3]) of the information field in the memory descriptor.
Bit[0], =0, indicates the next field is used as a range length for decode
(implies range length and base alignment of memory descriptor are equal).
Bit[0] is read-only.
Read/write value indicating the selected memory high address bits[23:16] for
memory descriptor 0.
If bit[0] of memory control is 0, this is the range length.
If bit[0] of memory control is 1, this is considered invalid.
0x41
0x42
Memory upper limit
address;
bits [23:16] or range
length;
bits [15:08] for
descriptor 0
Memory upper limit
bits [15:08] or range
length;
bits [15:08] for
descriptor 0
Memory descriptor 1
0x43
0x44
Read/write value indicating the selected memory high address bits[15:08] for
memory descriptor 0, either a memory address or a range length as described
above.
0x48-0x4C
Memory descriptor 1. This is the SRAM Space for Shared Memory.
Name
I/O port base address
bits[15:08] descriptor 0
Register
Index
0x60
Definition
Read/write value indicating the selected I/O lower limit address bits[15:08] for
I/O descriptor 0. If a logical device indicates it only uses 10 bit encoding, then
bits[15:10] do not need to be supported.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C961A_00 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C961AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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