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參數(shù)資料
| 型號(hào)： | AM79C961A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| 中文描述： | PCnet⑩- 2跳線的ISA，全雙工單芯片以太網(wǎng)控制器為ISA |
| 文件頁數(shù)： | 30/85頁 |
| 文件大?。?/td> | 1088K |
| 代理商： | AM79C961A |
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30
Am79C961A
P R E L I M I N A R Y
PIN DESCRIPTION:
NETWORK INTERFACES
AUI
CI+, CI–
Control Input
This is a differential input pair used to detect Collision
(Signal Quality Error Signal).
DI+, DI–
Data In
This is a differential receive data input pair to the
PCnet-ISA II controller.
DO+, DO–
Data Out
This is a differential transmit data output pair from the
PCnet-ISA II controller.
Twisted Pair Interface
RXD+, RXD–
Receive Data
This is the 10BASE-T port differential receive input
pair.
TXD+, TXD–
Transmit Data
These are the 10BASE-T port differential transmit
drivers.
TXP+, TXP–
Transmit Predistortion Control
These are 10BASE-T transmit waveform pre-distortion
control differential outputs.
PIN DESCRIPTION:
IEEE 1149.1 (JTAG) TEST ACCESS PORT
TCK
Test Clock
This is the clock input for the boundary scan test mode
operation. TCK can operate up to 10 MHz. TCK does
not have an internal pull-up resistor and must be con-
nected to a valid TTL level of high or low. TCK must not
be left unconnected.
TDI
Test Data Input
This is the test data input path to the PCnet-ISA II con-
troller. If left unconnected, this pin has a default value
of HIGH.
Input
Input
Output
Input
Output
Output
Input
Input
TDO
Test Data Output
This is the test data output path from the PCnet-ISA II
controller. TDO is tri-stated when JTAG port is inactive.
TMS
Test Mode Select
This is a serial input bit stream used to define the spe-
cific boundary scan test to be executed. If left uncon-
nected, this pin has a default value of HIGH.
PIN DESCRIPTION:
POWER SUPPLIES
All power pins with a “D” prefix are digital pins con-
nected to the digital circuitry and digital I/O buffers. All
power pins with an “A” prefix are analog power pins
connected to the analog circuitry. Not all analog pins
are quiet and special precaution must be taken when
doing board layout. Some analog pins are more noisy
than others and must be separated from the other
analog pins.
AVDD1–4
Analog Power (4 Pins)
Supplies power to analog portions of the PCnet-ISA II
controller. Special attention should be paid to the
printed circuit board layout to avoid excessive noise on
these lines.
AVSS1–2
Analog Ground (2 Pins)
Supplies ground reference to analog portions of
PCnet-ISA II controller. Special attention should be
paid to the printed circuit board layout to avoid exces-
sive noise on these lines.
DVDD1–7
Digital Power (7 Pins)
Supplies power to digital portions of PCnet-ISA II con-
troller. Four pins are used by Input/Output buffer drivers
and two are used by the internal digital circuitry.
DVSS1–13
Digital Ground (13 Pins)
Supplies ground reference to digital portions of
PCnet-ISA II controller. Ten pins are used by Input/Out-
put buffer drivers and two are used by the internal
digital circuitry.
Output
Input
Power
Power
Power
Power
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C961A_00 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C961AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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