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參數(shù)資料
| 型號(hào)： | Am70PDL127CDH85IT |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| 中文描述： | 2 × 64兆位（8米× 16位）的CMOS 3.0伏特，只有頁面模式閃存數(shù)據(jù)存儲(chǔ)128兆位（8米× 16位）的CMOS |
| 文件頁數(shù)： | 110/127頁 |
| 文件大小： | 849K |
| 代理商： | AM70PDL127CDH85IT |
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108
Am70PDL127CDH/Am70PDL129CDH
November 24, 2003
A D V A N C E I N F O R M A T I O N
DC CHARACTERISTICS
CMOS Compatible
Notes:
1. On the WP#/ACC pin only, the maximum input load current when WP# = V
IL
is ± 5.0 μA.
2. The I
CC
current listed is typically less than 2 mA/MHz, with OE# at V
IH
.
3. Maximum I
CC
specifications are tested with V
CC
= V
CC
max.
4. I
CC
active while Embedded Erase or Embedded Program is in progress.
5. Automatic sleep mode enables the low power mode when addresses remain stable for t
ACC
+ 30 ns.
6. If V
IO
< V
CC
, maximum V
IL
for CE# and DQ I/Os is 0.3 V
IO
. If V
IO
< V
CC
, minimum V
IH
for CE# and DQ I/Os is 0.7 V
IO
. Maximum V
IH
for these connections is V
IO
+ 0.3 V
7. V
CC
voltage requirements.
8. V
IO
voltage requirements.
9. Includes RY/BY#
10. Not 100% tested.
Parameter
Symbol
Parameter Description
(Notes)
Test Conditions
Min
Typ
Max
Unit
I
LI
Input Load Current (1)
V
IN
= V
SS
to V
CC
,
V
CC
= V
CC
max
±
1.0
μA
I
LIT
ACC Input Load Current
V
CC
= V
CC max
35
μA
I
LR
Reset Leakage Current
V
CC
= V
CC max
; RESET# = 12.5 V
35
μA
I
LO
Output Leakage Current
V
OUT
= V
SS
to V
CC
,
V
CC
= V
CC max
±
1.0
μA
I
CC1
V
CC
Active Read Current
(2, 3)
CE# = V
IL,
OE# = V
IH
,
5 MHz
15
20
mA
1 MHz
15
20
I
CC2
V
CC
Initial Page Read Current (2, 3)
CE# = V
IL,
OE# = V
IH
30
50
mA
I
CC3
V
CC
Intra-Page Read Current (2, 3)
CE# = V
IL,
OE# = V
IH
10
20
mA
I
CC4
V
CC
Active Write Current (3, 4)
CE# = V
IL,
OE# = V
IH
CE#, RESET# = V
CC
±
0.3 V,
WP# = V
IH
RESET# = V
SS
±
0.3 V, WP# = V
IH
V
IH
= V
CC
±
0.3 V;
V
IL
= V
SS
±
0.3 V, WP# = V
IH
50
60
mA
I
CC5
V
CC
Standby Current (3)
1
5
μA
I
CC6
V
CC
Reset Current (3)
1
5
μA
I
CC7
Automatic Sleep Mode (3, 5)
1
5
μA
V
IL1
Input Low Voltage 1(6, 7)
–0.5
0.8
V
V
IH1
Input High Voltage 1 (6, 7)
1.9
V
CC
+ 0.5
V
V
IL2
Input Low Voltage 2 (6, 8)
–0.5
0.3 x V
IO
V
V
IH2
Input High Voltage 2 (6, 8)
1.9
V
IO
+ 0.5
V
V
HH
Voltage for ACC Program
Acceleration
V
CC
= 2.7 –3.3 V
11.5
12.5
V
V
ID
Voltage for Autoselect and Temporary
Sector Unprotect
V
CC
= 2.7 –3.3 V
11.5
12.5
V
V
OL
Output Low Voltage (9)
I
OL
= 2.0 mA, V
CC
= V
CC min
= V
IO
0.15 x V
IO
V
V
OH1
Output High Voltage
I
OH
= –2.0 mA, V
CC
= V
CC min
= V
IO
0.85 V
IO
V
V
OH2
I
OH
= –100 μA, V
CC
= V
CC min
= V
IO
V
IO
–0.4
V
V
LKO
Low V
CC
Lock-Out Voltage (10)
2.3
2.5
V
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| AM70PDL129BDH | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| AM70PDL129BDH66I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
| AM70PDL129BDH66IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| AM70PDL129BDH66IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| AM70PDL129BDH85I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
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