- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄364671 > AM42DL16X2D 150NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM) PDF資料下載
參數(shù)資料
| 型號： | AM42DL16X2D |
| 英文描述： | 150NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM) |
| 中文描述： | Am42DL16x2D -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 55/60頁 |
| 文件大?。?/td> | 956K |
| 代理商： | AM42DL16X2D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁當前第55頁第56頁第57頁第58頁第59頁第60頁
54
Am42DL16x2D
March 4, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
Notes:
1. CE1#s controlled, if CIOs is low, ignore UB#s and LB#s timing.
1. t
CW
is measured from CE1#s going low to the end of write.
2. t
WR
is measured from the end of write to the address change. t
WR
applied in case a write ends as CE1#s or WE# going high.
3. t
AS
is measured from the address valid to the beginning of write.
4. A write occurs during the overlap (t
WP
) of low CE#1 and low WE#. A write begins when CE1#s goes low and WE# goes low when
asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation. A
write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
WP
is measured from the beginning of write
to the end of write.
Figure 31.
SRAM Write Cycle—CE1#s Control
Address
Data Valid
UB#s, LB#s
WE#
Data In
Data Out
High-Z
High-Z
t
WC
CE1#s
CE2s
t
AW
t
AS
(See Note 2 )
t
BW
t
(See Note 3)
t
WR
(See Note 4)
t
WP
(See Note 5)
t
DW
t
DH
相關PDF資料 |
PDF描述 |
|---|---|
| AM42DL16X4D | 150NS, PLCC, IND TEMP(EEPROM) |
| AM42DL32X4G | 150NS, 32LCC, 883C; LEV B COMPLIANT(EEPROM) |
| AM42DL6402G | 150NS, SOIC, IND TEMP(EEPROM) |
| AM42DL6404G | 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 4 Mbit (256 K x 16-Bit) Static RAM (Preliminary) |
| AM42DL640AG | 200NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM42DL16X4D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am42DL16x4D - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42DL3224GB25IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM |
| AM42DL3224GB30IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM |
| AM42DL3224GB35IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM |
| AM42DL3224GB40IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。