參數(shù)資料
型號: AM42DL16X2D
英文描述: 150NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM)
中文描述: Am42DL16x2D -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數(shù): 42/60頁
文件大?。?/td> 956K
代理商: AM42DL16X2D
March 4, 2002
Am42DL16x2D
41
P R E L I M I N A R Y
AC CHARACTERISTICS
Flash Word/Byte Configuration (CIOf)
Parameter
Speed Options
JEDEC
Std
Description
70
85
Unit
t
ELFL/
t
ELFH
CE#f to CIOf Switching Low or High
Max
5
ns
t
FLQZ
CIOf Switching Low to Output HIGH Z
Max
25
30
ns
t
FHQV
CIOf Switching High to Output Active
Min
70
85
ns
DQ15
Output
Data Output
(DQ7–DQ0)
CE#f
OE#
CIOf
t
ELFL
DQ14–DQ0
Data Output
(DQ14–DQ0)
DQ15/A-1
Address
Input
t
FLQZ
CIOf
Switching
from word
to byte
mode
DQ15
Output
Data Output
(DQ7–DQ0)
CIOf
t
ELFH
DQ14–DQ0
Data Output
(DQ14–DQ0)
DQ15/A-1
Address
Input
t
FHQV
CIOf
Switching
from byte
to word
mode
Figure 16.
CIOf Timings for Read Operations
Note:
Refer to the Erase/Program Operations table for t
AS
and t
AH
specifications.
Figure 17.
CIOf Timings for Write Operations
CE#f
WE#
CIOf
The falling edge of the last WE# signal
t
HOLD
(t
AH
)
t
SET
(t
AS
)
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