參數(shù)資料
型號(hào)： AM41LV3204M
英文描述： Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM (Preliminary)
中文描述： 堆疊式多芯片封裝（MCP）32兆位（4個(gè)M × 8位/ 2米x 16位）閃存和4兆位（為512k × 8-Bit/256畝x 16位），靜態(tài)存儲(chǔ)器（初步）
文件頁(yè)數(shù)： 63/67頁(yè)
文件大?。?/td> 1030K
代理商： AM41LV3204M
62
Am41LV3204M
June 10, 2003
P R E L I M I N A R Y
SRAM DATA RETENTION
Notes:
1. CE1#s
≥
V
CC
– 0.2 V, CE2s
≥
V
CC
– 0.2 V (CE1#s controlled) or CE2s
≤
0.2 V (CE2s controlled).
2. Typical values are not 100% tested.
Figure 31.
CE#1 Controlled Data Retention Mode
Figure 32.
CE2s Controlled Data Retention Mode
Parameter
Symbol
Parameter Description
Test Setup
Min
Typ
Max
Unit
V
DR
V
CC
for Data Retention
CE1#s
≥
V
CC
– 0.2 V (Note 1)
V
CC
= 3.0 V, CE1#s
≥
V
CC
– 0.2 V
(Note 1)
2.7
3.3
V
I
DR
Data Retention Current
1.0
(Note 2)
10
μA
t
SDR
t
RDR
Data Retention Set-Up Time
See data retention waveforms
0
ns
Recovery Time
t
RC
ns
V
DR
V
CC
2.7V
2.2V
CE1#s
GND
Data Retention Mode
CE1#s
≥
V
CC
-
0.2 V
t
SDR
t
RDR
V
CC
2.7 V
CE2#s
0.4 V
GND
V
DR
Data Retention Mode
t
SDR
t
RDR
CE2#s <
0.2 V
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