參數(shù)資料
型號: AM41LV3204M
英文描述: Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM (Preliminary)
中文描述: 堆疊式多芯片封裝(MCP)32兆位(4個M × 8位/ 2米x 16位)閃存和4兆位(為512k × 8-Bit/256畝x 16位),靜態(tài)存儲器(初步)
文件頁數(shù): 51/67頁
文件大?。?/td> 1030K
代理商: AM41LV3204M
50
Am41LV3204M
June 10, 2003
P R E L I M I N A R Y
AC CHARACTERISTICS
OE#
CE#f
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
Note:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle
Figure 21.
Toggle Bit Timings (During Embedded Algorithms)
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle
DQ2 and DQ6.
Figure 22.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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