參數(shù)資料
型號(hào): AM30LV0064DJ40F2I
英文描述: 8-SOIC (WIDE BODY) IND TEMP, GREEN(BIOS FLASH)
中文描述: NAND型閃存EEPROM
文件頁(yè)數(shù): 3/41頁(yè)
文件大小: 859K
代理商: AM30LV0064DJ40F2I
Am30LV0064D
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Special Handling Instructions .................................6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Functional Pin Description . . . . . . . . . . . . . . . . . . 8
Cell Layout And Address Assignment . . . . . . . . .9
Figure 1. Mass Storage Device Cell Layout.................. 9
Table 1. Address Assignment .......................................9
Ordering Information . . . . . . . . . . . . . . . . . . . . . .10
Device Bus Operations, Command Set, And
Command Definitions . . . . . . . . . . . . . . . . . . . . . .11
Table 2. Am30LV0064D Device Bus Operations ........11
Table 3. Am30LV0064D Command Set ......................11
Table 4. Am30LV0064D Command Definitions ..........12
Device Operations . . . . . . . . . . . . . . . . . . . . . . . .13
Read Operations ..................................................14
Figure 2. Read Data.................................................... 14
Figure 3. Gapless Read.............................................. 15
Figure 4. Read Spare Area......................................... 16
Table 5. Am30LV0064D ID Codes ..............................17
Figure 5. Read ID........................................................ 17
Figure 6. Device Status Register Bit Definition........... 18
Figure 7. Read Status................................................. 18
Program Operations .............................................18
Figure 8. Input Data and Page Program..................... 19
Figure 9. Program Operations Flow Chart.................. 20
Erase Operations .................................................21
Figure 10. Block Erase................................................ 21
Figure 11. Erase Suspend and Erase Resume........... 22
Reset Operation ...................................................23
Figure 12. Reset.......................................................... 23
Absolute Maximum Ratings . . . . . . . . . . . . . . . . .24
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 13. Maximum Negative
Overshoot Waveform.................................................. 24
Figure 14. Maximum Positive
Overshoot Waveform.................................................. 24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . .25
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 6. Test Specifications ........................................25
Figure 15. Test Setup.................................................. 25
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . .26
Command, Data, and Address Input ....................26
Normal Operation .................................................26
Mode Selection .....................................................27
Key To Switching Waveforms . . . . . . . . . . . . . . . 27
Figure 16. Command Input Cycle................................ 28
Figure 17. Address Input Cycle................................... 28
Figure 18. Data Input Cycle......................................... 29
Figure 19. Serial Read Cycle ...................................... 29
Figure 20. Status Read Cycle ..................................... 30
Figure 21. Read Data.................................................. 30
Figure 22. Read Data (Interrupted by CE#) ................ 31
Figure 23. Read Spare Area ....................................... 31
Figure 24. Sequential Read......................................... 32
Figure 25. Page Program............................................ 32
Figure 26. Block Erase................................................ 33
Figure 27. Erase Suspend........................................... 33
Figure 28. Erase Resume ........................................... 34
Figure 29. Sequential Page Program.......................... 34
Figure 30. ID and Manufacturer Read......................... 35
Figure 31. Write Protect (WP#) Timing During
Power Transitions........................................................ 35
Program And Erase Characteristics . . . . . . . . . 36
Valid Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 36
TSOP II Pin Capacitance . . . . . . . . . . . . . . . . . . . 36
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 37
TS 044—44/40-Pin Standard Thin Small
Outline Package II ................................................37
TSR044—44/40-Pin Reverse Thin Small
Outline Package II ................................................38
FBE040—40-Ball Fine Pitch Ball Grid Array
(FBGA) 8 x 15 mm package .................................39
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40
Revision B (December 1998) ...............................40
Revision B+1 (January 1999) ...............................40
Revision B+2 (February 1999) .............................41
Revision B+3 (March 8, 1999) ..............................41
Revision B+4 (April 21, 1999) ..............................41
Revision B+5 (June 17, 1999) ..............................41
Revision C (May 19, 2000) ...................................41
Revision C+1 (June 23, 2000) ..............................41
Revision C+2 (August 14, 2000) ..........................41
Revision C+3 (October 6, 2000) ...........................41
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