參數(shù)資料
型號: AM29BDS128HD9VKI
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
中文描述: 8M X 16 FLASH 1.8V PROM, 50 ns, PBGA80
封裝: 11.50 X 9 MM, 0.80 MM PITCH, FPBGA-80
文件頁數(shù): 74/89頁
文件大?。?/td> 913K
代理商: AM29BDS128HD9VKI
72
Am29BDS128H/Am29BDS640H
27024B3 May 10, 2006
D A T A S H E E T
AC CHARACTERISTICS
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. “In progress” and “complete” refer to status of program operation.
3. Amax–A12 are don’t care during command sequence unlock cycles.
4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.
5. Either CE# or AVD# is required to go from low to high in between programming command sequences.
6. The Synchronous programming operation is dependent of the Set Device Read Mode bit in the Configuration Register. The
Configuration Register must be set to the Synchronous Read Mode.
Figure 36.
Synchronous Program Operation Timings: WE# Latched Addresses
OE#
CE#f
Data
Addresses
AVD#
WE#
CLK
V
CC
f
555h
PD
t
WC
t
WPH
t
WP
PA
t
VCS
t
DH
t
CH
In
Progress
t
WHWH1
VA
Complete
VA
Program Command Sequence (last two cycles)
Read Status Data
t
DS
t
AVDP
A0h
t
ACS
t
CAS
t
ACH
t
AVCH
t
CSW
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