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[ASAHI KASEI] [AK7706]
<M0058-E-01>
1999/10
- 34 -
(6) Audio data interface (internal connection mode )
The serial audio data pins SDIN1, SDIN2 ,SDIN3, SDOUT1, SDOUT2, SDOUT3 and SDOUT4 are interfaced with the external
system, using LRCLK and BITCLK. The data format is MSB-first 2's complement. Normally, the input/output format, in addition to
the standard format used by AKM, can be changed to the I2S compatible mode by setting the control register “CONT0 DIF(D5) to 1”.
(In this case, all input/output audio data pin interface are in the I2S compatible mode.)
The input SDIN1,SDIN2 and SDIN3 formats are MSB justified 24-bit at initialization. Setting the control registers CONT0: DIF1,
DIF0 will cause them to be compatible with LSB justified 24-bit, 20-bit and 16-bit.
However, inidividul setting of SDIN1, SDIN2 and SDIN3 is not allowed.
The output SDOUT1, SDOUT2, SDOUT3 and SDOUT4 are fixed at 24 bits MSB justified.
At slave mode BITCLK corresponds to not only 64fs but also 48fs. But, we recommend 64fs. Following formats describe 64fs
examples.
6-1) Standard input format (DIF = 0: default set value)
a) Mode 1 (DIF1, DIF0 = 0,0: default set value)
* When you want to input the MSB-justified 20-bit data into SDIN1,2 and 3, input four "0s" following the LSB.
b) Mode 2, Mode 3, Mode 4
SDIN1,2,3 Mode 2: (DIF1, DIF0) = (0, 1) LSB justified 24-bit
SDIN1,2,3 Mode 3: (DIF1, DIF0) = (1, 0) LSB justified 20-bit.
SDIN1,2,3 Mode 4: (DIF1, DIF0) = (1, 1) LSB justified 16-bit
Right ch
Left ch
31 30 29 10 9 8 7 6 5 4 3 2 1 0 31 30 29 10 9 8 7 6 5 4 3 2 1 0
LRCLK
BITCLK
SDIN1,2,3
M 22 21
2 1 L
M 22 21
2 1 L
M: MSB L: LSB
Right ch
Left ch
31 30 23 22 21 20 19 18 17 16 15 1 0 31 30 23 22 21 20 19 18 17 16 15 1 0
LRCLK
BITCLK
SDIN1,2,3
Mode 2
Don't Care M 22 212019 18 17 16 15 1 L Don't Care M 22 212019 18 17 16 15 1 L
M: MSB , L : LSB
Don't Care M 18 17 16 15 1 L Don't Care M 18 1716 15 1 L
Don't Care M 1 L Don't Care M 1 L
SDIN1,2,3
Mode 3
SDIN1,2,3
Mode 4