參數(shù)資料
型號: AK7706VT
英文描述: Consumer IC
中文描述: 消費性IC
文件頁數(shù): 13/52頁
文件大小: 1085K
代理商: AK7706VT
[ASAHI KASEI] [AK7706]
<M0058-E-01>
1999/10
- 13 -
3-3) Audio interface
(DVDD=5.0V
±
5%,Ta=-40~85
°
C,CL=20pF)
Parameter
Slave mode
BITCLKfrequency
BITCLK low level width
BITCLK high level width
Delay time from BITCLK"
" to LRCLK
Delay time from LRCLK to BITCLK "
"
Delay time from LRCLK to serial data output
Delay time from BITCLK to serial data output
Serial data input latch hold time
Serial data input latch setup time
Master mode
BITCLK frequency
BITCLK duty factor
Delay time from BITCLK"
" to LRCLK
Delay time from LRCLK to BITCLK"
"
Delay time from LRCLK to serial data output
Delay time from BITCLK to serial data output
Serial data input latch hold time
Serial data input latch setup time
Symbol
min
typ
max
Unit
fBCLK
tBCLKL
tBCLKH
tBLRD
tLRBD
tLRD
tBSOD
tBSIDS
tBSIDH
48
65
65
40
40
64
fs
ns
ns
ns
ns
ns
ns
ns
ns
70
70
40
40
fBCLK
64
50
fs
%
ns
ns
ns
ns
ns
ns
tBLRD
tLRBD
tLRD
tBSOD
tBSIDS
tBSIDH
40
40
70
70
40
40
(DVDD=3.3V
±
10%,Ta=-40~85
°
C,CL=20pF)
Parameter
Slave mode
BITCLKfrequency
BITCLK low level width
BITCLK high level width
Delay time from BITCLK"
" to LRCLK
Delay time from LRCLK to BITCLK "
"
Delay time from LRCLK to serial data output
Delay time from BITCLK to serial data output
Serial data input latch hold time
Serial data input latch setup time
Master mode
BITCLK frequency
BITCLK duty factor
Delay time from BITCLK"
" to LRCLK
Delay time from LRCLK to BITCLK"
"
Delay time from LRCLK to serial data output
Delay time from BITCLK to serial data output
Serial data input latch hold time
Serial data input latch setup time
Symbol
min
typ
max
Unit
fBCLK
tBCLKL
tBCLKH
tBLRD
tLRBD
tLRD
tBSOD
tBSIDS
tBSIDH
48
100
100
80
80
64
fs
ns
ns
ns
ns
ns
ns
ns
ns
140
140
80
80
fBCLK
64
50
fs
%
ns
ns
ns
ns
ns
ns
tBLRD
tLRBD
tLRD
tBSOD
tBSIDS
tBSIDH
80
80
140
140
80
80
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