2-60 Revision 16 Table 2-88 AGLP060 Global Resource Commercial-Case Condition" />
參數(shù)資料
型號： AGLP125V2-CS281I
廠商： Microsemi SoC
文件頁數(shù)： 107/134頁
文件大小： 0K
描述： IC FPGA IGLOO PLUS 125K 281-CSP
標(biāo)準(zhǔn)包裝： 184
系列： IGLOO PLUS
邏輯元件/單元數(shù)： 3120
RAM 位總計： 36864
輸入/輸出數(shù)： 212
門數(shù)： 125000
電源電壓： 1.14 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 281-TFBGA，CSBGA
供應(yīng)商設(shè)備封裝： 281-CSP（10x10）
IGLOO PLUS DC and Switching Characteristics
2-60
Revision 16
Table 2-88 AGLP060 Global Resource
Commercial-Case Conditions: TJ = 70°C, VCC = 1.14 V
Parameter
Description
Std.
Units
Min.1
Max.2
tRCKL
Input Low Delay for Global Clock
2.02
2.43
ns
tRCKH
Input High Delay for Global Clock
2.09
2.65
ns
tRCKMPWH
Minimum Pulse Width High for Global Clock
1.40
ns
tRCKMPWL
Minimum Pulse Width Low for Global Clock
1.65
ns
tRCKSW
Maximum Skew for Global Clock
0.56
ns
Notes:
1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential element,
located in a lightly loaded row (single element is connected to the global net).
2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element, located in a fully
loaded row (all available flip-flops are connected to the global net in the row).
3. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values.
Table 2-89 AGLP125 Global Resource
Commercial-Case Conditions: TJ = 70°C, VCC = 1.14 V
Parameter
Description
Std.
Units
Min.1
Max.2
tRCKL
Input Low Delay for Global Clock
2.08
2.54
ns
tRCKH
Input High Delay for Global Clock
2.15
2.77
ns
tRCKMPWH
Minimum Pulse Width High for Global Clock
1.40
ns
tRCKMPWL
Minimum Pulse Width Low for Global Clock
1.65
ns
tRCKSW
Maximum Skew for Global Clock
0.62
ns
Notes:
1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential element,
located in a lightly loaded row (single element is connected to the global net).
2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element, located in a fully
loaded row (all available flip-flops are connected to the global net in the row).
3. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLP125-V2CS289 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125V2-CS289 功能描述:IC FPGA IGLOO PLUS 125K 289-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
AGLP125-V2CS289ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125-V2CS289I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125V2-CS289I 功能描述:IC FPGA IGLOO PLUS 125K 289-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
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