參數(shù)資料
型號: ADZS-BF537-STAMP
廠商: Analog Devices Inc
文件頁數(shù): 13/68頁
文件大?。?/td> 0K
描述: SYSTEM DEV FOR ADSP-BF537
產(chǎn)品培訓(xùn)模塊: Blackfin® STAMP BSP
Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標準包裝: 1
系列: Blackfin®
類型: DSP
適用于相關(guān)產(chǎn)品: ADSP-BF537
所含物品: ADSP-BF537 STAMP 板和軟件
配用: ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARD
相關(guān)產(chǎn)品: ADSP-BF537KBCZ-6BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBCZ-5BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537KBCZ-6AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5B-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBC-5A-ND - IC DSP CTLR 16BIT 182CSPBGA
其它名稱: ADDS-BF537-STAMP
ADDS-BF537-STAMP-ND
Rev. J
|
Page 20 of 68
|
February 2014
Port F: GPIO/UART1–0/Timer7–0/SPI/
External DMA Request/PPI
(* = High Source/High Sink Pin)
PF0* – GPIO/UART0 TX/DMAR0
I/O
GPIO/UART0 Transmit/DMA Request 0
C
PF1* – GPIO/UART0 RX/DMAR1/TACI1
I/O
GPIO/UART0 Receive/DMA Request 1/Timer1 Alternate Input Capture
C
PF2* – GPIO/UART1 TX/TMR7
I/O
GPIO/UART1 Transmit/Timer7
C
PF3* – GPIO/UART1 RX/TMR6/TACI6
I/O
GPIO/UART1 Receive/Timer6/Timer6 Alternate Input Capture
C
PF4* – GPIO/TMR5/SPI SSEL6
I/O
GPIO/Timer5/SPI Slave Select Enable 6
C
PF5* – GPIO/TMR4/SPI SSEL5
I/O
GPIO/Timer4/SPI Slave Select Enable 5
C
PF6* – GPIO/TMR3/SPI SSEL4
I/O
GPIO/Timer3/SPI Slave Select Enable 4
C
PF7* – GPIO/TMR2/PPI FS3
I/O
GPIO/Timer2/PPI Frame Sync 3
C
PF8 – GPIO/TMR1/PPI FS2
I/O
GPIO/Timer1/PPI Frame Sync 2
C
PF9 – GPIO/TMR0/PPI FS1
I/O
GPIO/Timer0/PPI Frame Sync 1
C
PF10 – GPIO/SPI SSEL1
I/O
GPIO/SPI Slave Select Enable 1
C
PF11 – GPIO/SPI MOSI
I/O
GPIO/SPI Master Out Slave In
C
PF12 – GPIO/SPI MISO
I/O
GPIO/SPI Master In Slave Out (This pin should be pulled high through a 4.7 k
resistor if booting via the SPI port.)
C
PF13 – GPIO/SPI SCK
I/O
GPIO/SPI Clock
D
PF14 – GPIO/SPI SS/TACLK0
I/O
GPIO/SPI Slave Select/Alternate Timer0 Clock Input
C
PF15 – GPIO/PPI CLK/TMRCLK
I/O
GPIO/PPI Clock/External Timer Reference
C
Port G: GPIO/PPI/SPORT1
PG0 – GPIO/PPI D0
I/O
GPIO/PPI Data 0
C
PG1 – GPIO/PPI D1
I/O
GPIO/PPI Data 1
C
PG2 – GPIO/PPI D2
I/O
GPIO/PPI Data 2
C
PG3 – GPIO/PPI D3
I/O
GPIO/PPI Data 3
C
PG4 – GPIO/PPI D4
I/O
GPIO/PPI Data 4
C
PG5 – GPIO/PPI D5
I/O
GPIO/PPI Data 5
C
PG6 – GPIO/PPI D6
I/O
GPIO/PPI Data 6
C
PG7 – GPIO/PPI D7
I/O
GPIO/PPI Data 7
C
PG8 – GPIO/PPI D8/DR1SEC
I/O
GPIO/PPI Data 8/SPORT1 Receive Data Secondary
C
PG9 – GPIO/PPI D9/DT1SEC
I/O
GPIO/PPI Data 9/SPORT1 Transmit Data Secondary
C
PG10 – GPIO/PPI D10/RSCLK1
I/O
GPIO/PPI Data 10/SPORT1 Receive Serial Clock
D
PG11 – GPIO/PPI D11/RFS1
I/O
GPIO/PPI Data 11/SPORT1 Receive Frame Sync
C
PG12 – GPIO/PPI D12/DR1PRI
I/O
GPIO/PPI Data 12/SPORT1 Receive Data Primary
C
PG13 – GPIO/PPI D13/TSCLK1
I/O
GPIO/PPI Data 13/SPORT1 Transmit Serial Clock
D
PG14 – GPIO/PPI D14/TFS1
I/O
GPIO/PPI Data 14/SPORT1 Transmit Frame Sync
C
PG15 – GPIO/PPI D15/DT1PRI
I/O
GPIO/PPI Data 15/SPORT1 Transmit Data Primary
C
Table 9. Pin Descriptions (Continued)
Pin Name
Type Function
Driver
Type1
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