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參數(shù)資料
| 型號： | ADV7197KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Multiformat HDTV Encoder with Three 11-Bit DACs |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP52 |
| 封裝： | PLASTIC, MQFP-52 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大?。?/td> | 229K |
| 代理商： | ADV7197KST |
REV. 0
ADV7197
–17–
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors.
Optimum performance is achieved by the use of 0.1
μ
F ceramic
capacitors. Each of group of V
AA
or V
DD
pins should be indi-
vidually decoupled to ground. This should be done by placing
the capacitors as close as possible to the device with the capaci-
tor leads as short as possible, thus minimizing lead inductance.
Digital Signal Interconnect
The digital signal lines should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal lines should not overlay the analog power plane.
Due to the high clock rates used, long clock lines to the ADV7197
should be avoided to minimize noise pickup. Any active pull-up
termination resistors for the digital inputs should be connected
to the digital power plane and not the analog power plane.
Analog Signal Interconnect
The ADV7197 should be located as close as possible to the
output connectors thus minimizing noise pickup and reflections
due to impedance mismatch.
For optimum performance, the analog outputs should each have
a source termination resistance to ground of 75
. This termi-
nation resistance should be as close as possible to the ADV7197
to minimize reflections.
Any unused inputs should be tied to ground.
300
5k
5k
MPU BUS
4.7k
V
AA
POWER SUPPLY DECOUPLING
FOR EACH POWER SUPPLY GROUP
ALSB
DV
RESET
CLKIN
R
SET
SDA
SCL
DAC A
V
DD
VSYNC
/TSYNC
ADV7197
UNUSED
INPUTS
SHOULD BE
GROUNDED
DAC B
100
HSYNC
/
SYNC
DAC C
27MHz, 74.25MHz OR
74.1758MHz CLOCK
4.7k
4.7 F
6.3V
300
300
100
2.47k OR 2.82k
10nF
0.1 F
Y OUTPUT
Pr(V) OUTPUT
Pb(U) OUTPUT
V
REF
GND
13, 52
AGND
26, 33
Y0
–
Y9
Cr0
–
Cr9
Cb/Cr0
–
Cb/Cr9
0.1 F
10nF
0.1 F
24, 35
1, 12
V
DD
V
AA
COMP
V
AA
V
AA
V
DD
V
DD
V
DD
Figure 24. Circuit Layout
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7197KSZ | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI-FORMAT HDTV ENCODER, 3 11-BIT DACS - Bulk |
| ADV7202 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Simultaneous Sampling Video Rate Codec |
| ADV7202KST | 制造商:Rochester Electronics LLC 功能描述:27MHZ DTV PICTURE IN PICTURE CODEC I.C. - Bulk 制造商:Analog Devices 功能描述: |
| ADV7202KSTZ | 功能描述:IC CODEC VIDEO 10BIT 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADV7280ABCPZ-M | 功能描述:10-BIT SD VIDEO DECODER 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:視頻 數(shù)據(jù)接口:I2C，串行 分辨率（位）:10 b ADC/DAC 數(shù):1 / 0 三角積分:無 信噪比，ADC/DAC（db）（典型值）:- 動態(tài)范圍，ADC/DAC（db）（典型值）:- 電壓 - 電源，模擬:1.71 V ~ 1.89 V 電壓 - 電源，數(shù)字:1.71 V ~ 1.89 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-WFQFN 裸露焊盤，CSP 供應商器件封裝:32-LFCSP-WQ（5x5） 標準包裝:1 |
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