參數(shù)資料
型號: ADV7197KST
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: Multiformat HDTV Encoder with Three 11-Bit DACs
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP52
封裝: PLASTIC, MQFP-52
文件頁數(shù): 15/20頁
文件大?。?/td> 229K
代理商: ADV7197KST
REV. 0
ADV7197
–15–
MODE REGISTER 4
MR4 (MR47–MR40)
(Address (SR4–SR0) = 04H)
Figure 19 shows the various operations under the control of
Mode Register 4.
MR4 BIT DESCRIPTION
Timing Reset (MR40)
Toggling MR40 from low to high and low again resets the inter-
nal horizontal and vertical timing counters.
MODE REGISTER 5
MR5 (MR57–MR50)
(Address (SR4-SR0) = 05H)
Figure 20 shows the various operations under the control of
Mode Register 5.
MR5 BIT DESCRIPTION
Reserved (MR50)
This bit is reserved for the revision code.
RGB Mode (MR51)
When RGB mode is enabled (MR51 = “1”) the ADV7197
accepts unsigned binary RGB data at its input port. This control
is also available in Async Timing Mode.
Sync on PrPb (MR52)
By default the color component output signals Pr, Pb do not
contain any horizontal sync pulses. They can be inserted when
MR52 = “1.”
This control is not available in RGB mode.
MR47
MR42
MR44
MR46
ZERO MUST BE
WRITTEN TO
THESE REGISTERS
MR47
MR41
MR45
MR43
MR41
MR40
MR40
TIMING RESET
Figure 19. Mode Register 4
MR57
MR52
MR56
MR55
MR53
MR50
MR54
MR53
0
1
DAC B = Pr
DAC C = Pr
COLOR OUTPUT
SWAP
MR52
0
1
DISABLE
ENABLE
SYNC ON PrPb
MR51
0
1
DISABLE
ENABLE
RGB MODE
RESERVED FOR
REVISION CODE
MR50
MR51
ZERO MUST BE
WRITTEN TO
THESE BITS
MR57
MR54
Figure 20. Mode Register 5
Color Output Swap (MR53)
By default DAC B is configured as the Pr output and DAC C
as the Pb output. In setting this bit to “1” the DAC outputs
can be swapped around so that DAC B outputs Pb and DAC C
outputs Pr. The table below demonstrates this in more detail.
This control is also available in RGB mode.
Reserved (MR54–MR57)
A “0” must be written to these bits.
Table II. Relationship Between Color Input Pixel Port, MR53
and DAC B, DAC C Outputs
In 4:4:4 Input Mode
Color Data
Input on Pins
Analog Output
Signal
MR53
Cr9–0
Cb/Cr9–0
Cr9–0
Cb/Cr9–0
0
0
1
1
DAC B
DAC C
DAC C
DAC B
In 4:2:2 Input Mode
Color Data
Input on Pins
Analog Output
Signal
MR53
Cr9–0
Cb/Cr9–0
Cb/Cr9–0
0 or 1
0
1
Not Operational
DAC C (Pb)
DAC C (Pr)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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