- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374046 > ADV7180BSTZ (ANALOG DEVICES INC) 10-Bit, 4 x Oversampling SDTV Video Decoder PDF資料下載
參數(shù)資料
| 型號： | ADV7180BSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, PQFP64 |
| 封裝： | 10 X 10 MM, ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 44/112頁 |
| 文件大小： | 1320K |
| 代理商： | ADV7180BSTZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁當前第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁
ADV7180
VS and FIELD Configuration
The following controls allow the user to configure the behavior
of the VS and FIELD output pins, as well as the generation of
embedded AV codes.
Note that the ADV7180 LQFP-64 has separate VS and FIELD pins.
The ADV7180 LFCSP-40 does not have separate VS and FIELD
pins, but can output either one on Pin 37, the VS/FIELD pin.
VSYNC/FIELD SELECT, Address 0x58 [0]
This feature is used for the ADV7180 LFCSP-40 (ADV7180BCPZ)
only. The polarity of this bit determines what signal appears on
the VS/FIELD pin.
When this bit is set to 0 (default), the FIELD signal is output.
When this bit is set to 1, the VSYNC signal is output.
The ADV7180 LQFP-64 (ADV7180BSTZ) has dedicated FIELD
and VSYNC pins.
ADV encoder-compatible signals via NEWAVMODE are
PVS, PF
HVSTIM
VSBHO, VSBHE
VSEHO, VSEHE
Rev. A | Page 44 of 112
For NTSC control,
NVBEGDELO, NVBEGDELE, NVBEGSIGN, NVBEG[4:0]
NVENDDELO, NVENDDELE, NVENDSIGN,
NVEND[4:0]
NFTOGDELO, NFTOGDELE, NFTOGSIGN,
NFTOG[4:0]
For PAL control,
PVBEGDELO, PVBEGDELE, PVBEGSIGN, PVBEG[4:0]
PVENDDELO, PVENDDELE, PVENDSIGN, PVEND[4:0]
PFTOGDELO, PFTOGDELE, PFTOGSIGN, PFTOG[4:0]
NEWAVMODE, New AV Mode, Address 0x31 [4]
When NEWAVMODE is 0, EAV/SAV codes are generated to
suit Analog Devices encoders. No adjustments are possible.
Setting NEWAVMODE to 1 (default) enables the manual position
of the VSYNC, FIELD, and AV codes using Register 0x34 to
Register 0x37 and Register 0xE5 to Register 0xEA. Default register
settings are CCIR656 compliant; see Figure 33 for NTSC and
Figure 38 for PAL. For recommended manual user settings,
see Table 61 and Figure 34 for NTSC and Table 62 and Figure 39
for PAL.
HVSTIM, Horizontal VS Timing, Address 0x31 [3]
The HVSTIM bit allows the user to select where the VS signal is
asserted within a line of video. Some interface circuitry may
require VS to go low while HS is low.
When HVSTIM is 0 (default), the start of the line is relative to
HSE.
When HVSTIM is 1, the start of the line is relative to HSB.
VSBHO, VS Begin Horizontal Position Odd, Address 0x32 [7]
The VSBHO and VSBHE bits select the position within a line at
which the VS pin (not the bit in the AV code) becomes active.
Some follow-on chips require the VS pin to change state only
when HS is high/low.
When VSBHO is 0 (default), the VS pin goes high at the middle
of a line of video (odd field).
When VSBHO is 1, the VS pin changes state at the start of a line
(odd field).
VSBHE, VS Begin Horizontal Position Even, Address 0x32 [6]
The VSBHO and VSBHE bits select the position within a line at
which the VS pin (not the bit in the AV code) becomes active.
Some follow-on chips require the VS pin to only change state
when HS is high/low.
When VSBHE is 0 (default), the VS pin goes high at the middle
of a line of video (even field).
When VSBHE is 1, the VS pin changes state at the start of a line
(even field).
VSEHO, VS End Horizontal Position Odd, Address 0x33 [7]
The VSEHO and VSEHE bits select the position within a line at
which the VS pin (not the bit in the AV code) becomes active.
Some follow-on chips require the VS pin to change state only
when HS is high/low.
When VSEHO is 0 (default), the VS pin goes low (inactive) at
the middle of a line of video (odd field).
When VSEHO is 1, the VS pin changes state at the start of a line
(odd field).
VSEHE, VS End Horizontal Position Even, Address 0x33 [6]
The VSEHO and VSEHE bits select the position within a line at
which the VS pin (not the bit in the AV code) becomes active.
Some follow-on chips require the VS pin to only change state
when HS is high/low.
When VSEHE is 0 (default), the VS pin goes low (inactive) at
the middle of a line of video (even field).
When VSEHE is 1, the VS pin changes state at the start of a line
(even field).
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7181 | Multiformat SDTV Video Decoder |
| ADV7181B | Multiformat SDTV Video Decoder |
| ADV7181BBCPZ | Multiformat SDTV Video Decoder |
| ADV7181BBSTZ | Multiformat SDTV Video Decoder |
| ADV7181BCP | Multiformat SDTV Video Decoder |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7180BSTZ | 制造商:Analog Devices 功能描述:Video IC |
| ADV7180BSTZ-REEL | 功能描述:IC VIDEO DECODER SDTV 64-LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應用:LCD 電視機/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| ADV7180KCP32Z | 功能描述:IC VIDEO DECODER 10BIT 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7180KCP32Z-RL | 功能描述:IC VIDEO DECODER 10BIT 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7180KST48Z | 功能描述:IC VID DECOD SDTV 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
發(fā)布緊急采購，3分鐘左右您將得到回復。