參數(shù)資料
型號: ADV471
廠商: Analog Devices, Inc.
英文描述: CMOS 80 MHz Monolithic Color Palette RAM-DACs(80MHz單片256×18彩色調(diào)色器RAM-D/A轉(zhuǎn)換器)
中文描述: 80兆赫的CMOS單片調(diào)色板RAM的數(shù)模轉(zhuǎn)換器(80MHz的單片256 × 18彩色調(diào)色器RAM的的D / A轉(zhuǎn)換器)
文件頁數(shù): 9/12頁
文件大?。?/td> 198K
代理商: ADV471
ADV478/ADV471
–9–
REV. B
T he contents of the pixel read mask register, which may be ac-
cessed by the MPU at any time, are bit-wise logically ANDed
with the P0–P7 inputs. Bit D0 of the pixel read mask register
corresponds to pixel input P0. T he addressed location provides
24 bits (18 bits for the ADV471) of color information to the
three D/A converters.
For additional information on Pixel Mask Register, see applica-
tion note “Animation Using the Pixel Read Mask Register of the
ADV47X Series of Video RAM-DACs” (Publication Number
E1316–15–10/89).
T he
SYNC
and
BLANK
inputs, also latched on the rising edge
of CLOCK to maintain synchronization with the color data, add
appropriately weighted currents to the analog outputs, produc-
ing the specific output levels required for video applications, as
illustrated in Figures 3 and 4. T ables IV and V detail how the
SYNC
and
BLANK
inputs modify the output levels.
T he SET UP input is used to specify whether a 0 IRE (SET UP
= GND) or 7.5 IRE (SET UP = V
AA
) blanking pedestal is to be
used.
T he analog outputs of the ADV478 and ADV471 are capable
of directly driving a 37.5
load, such as a doubly terminated
75
coaxial cable.
Figure 4. Composite Video Output Waveform (SETUP = GND)
T able V. Video Output T ruth T able (SE T UP = GND)
DAC
Input Data
Description
I
OUT
(mA)
l
SYNC
BLANK
WHIT E LEVEL
DAT A
DAT A-SYNC
BLACK LEVEL
BLACK -SYNC
BLANK LEVEL
SYNC LEVEL
26.67
data+8.05
data
8.05
0
8.05
0
1
1
0
1
0
1
0
1
1
1
1
1
0
0
FFH
data
data
00H
00H
xxH
xxH
NOT E
1
T ypical with full-scale IOG= 26.67 mA, SET UP = GND.
External voltage or current reference adjusted for 26.67 mA full-scale output.
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ADV473 CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC(三通道,8位視頻RAM-DAC)
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