參數(shù)資料
型號: ADV471
廠商: Analog Devices, Inc.
英文描述: CMOS 80 MHz Monolithic Color Palette RAM-DACs(80MHz單片256×18彩色調(diào)色器RAM-D/A轉(zhuǎn)換器)
中文描述: 80兆赫的CMOS單片調(diào)色板RAM的數(shù)模轉(zhuǎn)換器(80MHz的單片256 × 18彩色調(diào)色器RAM的的D / A轉(zhuǎn)換器)
文件頁數(shù): 11/12頁
文件大?。?/td> 198K
代理商: ADV471
ADV478/ADV471
–11–
REV. B
Digital Signal Interconnect
T he digital inputs to the ADV478/ADV471 should be isolated
as much as possible from the analog outputs and other analog
circuitry. Also, these input signals should not overlay the analog
power plane.
Due to the high clock rates involved, long clock lines to the
ADV478/ADV471 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (V
CC
), and not the
analog power plane.
Analog Signal Interconnect
T he ADV478/ADV471 should be located as close as possible to
the output connectors to minimize noise pickup and reflections
due to impedance mismatch.
T he video output signals should overlay the ground plane, and
not the analog power plane, to maximize the high frequency
power supply rejection.
For maximum performance, the analog outputs should each
have a 75
load resistor connected to GND. T he connection
between the current output and GND should be as close as pos-
sible to the ADV478/ADV471 to minimize reflections.
NOT E: Additional information on PC Board layout can be
obtained in an application note entitled “Design and Layout of
a Video Graphics System for Reduced EMI” from Analog
Devices (Publication Note E1309–15–10/89).
Figure 6. Typical Connection Diagram and Component List (External Current Reference)
RS-170 Video Generation
For generation of RS-170 compatible video, it is recommended
that the DAC outputs be connected to a singly terminated 75
load. If the ADV478/ADV471 is not driving a large capacitive
load, there will be negligible difference in video quality between
doubly terminated 75
and singly terminated 75
loads.
If driving a large capacitive load (load RC> 1/(2
π
f
C
)), it is rec-
ommended that an output buffer (such as an AD848 or
AD9617 with an unloaded gain>2) be used to drive a doubly
terminated 75
load.
APPLICAT ION INFORMAT ION
E X T E RNAL VOLT AGE VS. CURRE NT RE FE RE NCE
T he ADV478/ADV471 is designed to have excellent perfor-
mance using either an external voltage or current reference.
T he voltage reference design (Figure 5) has the advantages of
temperature compensation, simplicity, lower cost and provides
excellent power supply rejection. T he current reference design
(Figure 6) requires more components to provide adequate
power supply rejection and temperature compensation (two
transistors, three resistors and additional capacitors).
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ADV473KP135 Circular Connector; No. of Contacts:55; Series:LJTP02R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:17-35
ADV473KP66 Circular Connector; No. of Contacts:55; Series:LJTP02R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:17-35
ADV473KP80 Circular Connector; No. of Contacts:55; Series:LJTP02R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:17-55
ADV473 CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC(三通道,8位視頻RAM-DAC)
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