參數(shù)資料
型號(hào): ADV471
廠商: Analog Devices, Inc.
英文描述: CMOS 80 MHz Monolithic Color Palette RAM-DACs(80MHz單片256×18彩色調(diào)色器RAM-D/A轉(zhuǎn)換器)
中文描述: 80兆赫的CMOS單片調(diào)色板RAM的數(shù)模轉(zhuǎn)換器(80MHz的單片256 × 18彩色調(diào)色器RAM的的D / A轉(zhuǎn)換器)
文件頁(yè)數(shù): 2/12頁(yè)
文件大小: 198K
代理商: ADV471
REV. B
ADV478/ADV471–SPECIFICATIONS
Parameter
All Versions
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
Resolution (Each DAC)
3
Accuracy (Each DAC)
3
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
DIGIT AL OUT PUT S
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
ANALOG OUT PUT S
Gray Scale Current Range
Output Current
White Level Relative to Blank
8 (6)
Bits
±
1 (1/4)
±
1 (1/4)
±
5
Binary
LSB max
LSB max
% Gray Scale max
Guaranteed Monotonic
2
0.8
±
1
7
V min
V max
μ
A max
pF max
V
IN
= 0.4 V or 2 .4 V
2.4
0.4
50
7
V min
V max
μ
A max
pF max
I
SOURCE
= 400
μ
A
I
SINK
= 3.2 mA
20
mA max
17.69
20.40
16.74
18.50
0.95
1.90
0
50
6.29
8.96
0
50
69.1 (279.68)
5
–1
+1.5
10
30
mA min
mA max
mA min
mA max
mA min
mA max
μ
A min
μ
A max
mA min
mA max
μ
A min
μ
A max
μ
A typ
% max
V min
V max
k
typ
pF max
T ypically 19.05 mA
White Level Relative to Black
T ypically 17.62 mA
Black Level Relative to Blank
(SET UP = V
AA
)
Black Level Relative to Blank
(SET UP = GND)
Blank Level
T ypically 1.44 mA
T ypically 5
μ
A
T ypically 7.62 mA
Sync Level
T ypically 5
μ
A
LSB Size
3
DAC to DAC Matching
Output Compliance, V
OC
8/
6
= Logical 1 for ADV478
T ypically 2%
Output Impedance, R
OUT
Output Capacitance, C
OUT
VOLT AGE REFERENCE
Voltage Reference Range, V
REF
Input Current, I
VREF
I
OUT
= 0 mA
1.14/1.26
10
V min/V max
μ
A typ
T ested in Voltage Reference
Configuration with V
REF
= 1.235 V
POWER SUPPLY
Supply Voltage, V
AA
4.75/5.25
4.50/5.50
220
0.5
1100
V min/V max
V min/V max
mA max
%/% max
mW max
80 MHz and 66 MHz Parts
50 MHz and 35 MHz Parts
T ypically 180 mA
f = 1 kHz, COMP = 0.1
μ
F
T ypically 900 mW, V
AA
= 5 V
Supply Current, I
AA
Power Supply Rejection Ratio
Power Dissipation
DYNAMIC PERFORMANCE
Clock and Data Feedthrough
4, 5
Glitch Impulse
4, 5
DAC to DAC Crosstalk
6
–30
75
–23
dB typ
pV secs typ
dB typ
NOT ES
1
±
5% for 80 MHz and 66 MHz parts;
±
10% for 50 MHz and 35 MHz parts.
2
T emperature Range (T
to T
); 0
°
C to +70
°
C.
3
Numbers in parentheses indicate ADV471 parameter value.
4
Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. For this test, the digital inputs have a 1 k
resistor to
ground and are driven by 74HC logic. Glitch impulse includes clock and data feedthrough, –3 dB test bandwidth = 2
×
clock rate.
5
T T L input values are 0 to 3 volts, with input rise/fall times
3 ns, measured between the 10% and 90% points. T iming reference points at 50% for inputs and out-
puts. Analog output load
10 pF, D0–D7 output load
50 pF. See timing notes in Figure 2.
6
DAC to DAC crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
(V
AA1
= +5 V, SETUP = 8/
6
= V
AA
, V
REF
= +1.235 V. R
SET
= 147
V
.
All specifications T
MN
to T
MAX2
unless otherwse noted.)
–2–
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