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參數(shù)資料
| 型號： | ADUC836BSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC DUAL 16BIT W/MCU 52-MQFP |
| 產(chǎn)品培訓模塊： | Process Control |
| 標準包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設備： | POR，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 7x16b; D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 738 (CN2011-ZH PDF) |
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ADuC836
–32–
ADuC836
–33–
Using the Flash/EE Data Memory
The 4 Kbytes of Flash/EE data memory are configured as
1024 pages, each of four bytes. As with the other ADuC836
peripherals, the interface to this memory space is via a group of
registers mapped in the SFR space. A group of four data regis-
ters (EDATA1–A4) is used to hold the four bytes of data at each
page.The page is addressed via the two registers EADRH and
EADRL. Finally, ECON is an 8-bit control register that may be
written with one of nine Flash/EE memory access commands to
trigger various read, write, erase, and verify functions.
A block diagram of the SFR interface to the Flash/EE data
memory array is shown in Figure 20.
ECON—Flash/EE Memory Control SFR
Programming of either the Flash/EE data memory or the Flash/EE
program memory is done through the Flash/EE Memory Control
SFR (ECON).This SFR allows the user to read, write, erase, or
verify the 4 Kbytes of Flash/EE data memory or the 56 Kbytes of
Flash/EE program memory.
BYTE 1
(0000H)
EDATA1
SF
R
BYTE 1
(0004H)
BYTE 1
(0008H)
BYTE 1
(000CH)
BYTE 1
(0FF8H)
BYTE 1
(0FFCH)
BYTE 2
(0001H)
EDATA2
SF
R
BYTE 2
(0005H)
BYTE 2
(0009H)
BYTE 2
(000DH)
BYTE 2
(0FF9H)
BYTE 2
(0FFDH)
BYTE 3
(0002H)
EDATA3
SF
R
BYTE 3
(0006H)
BYTE 3
(000AH)
BYTE 3
(000EH)
BYTE 3
(0FFAH)
BYTE 3
(0FFEH)
BYTE 4
(0003H)
EDATA4
SF
R
BYTE 4
(0007H)
BYTE 4
(000BH)
BYTE 4
(000FH)
BYTE 4
(0FFBH)
BYTE 4
(0FFFH)
01H
00H
02H
03H
3FEH
3FFH
PAGE
ADDRESS
(E
ADRH/L
)
BYTE
ADDRESSES
ARE GIVEN IN
BRACKETS
Figure 20. Flash/EE Data Memory Control and Configuration
Table XIV. ECON—Flash/EE Memory Commands
Command Description
ECON Value
(Normal Mode) (Power-On Default)
(ULOAD Mode)
01H
Results in four bytes in the Flash/EE data memory,
Not Implemented. Use the MOVC instruction.
READ
addressed by the page address EADRH/L, being read
into EDATA 1 to 4.
02H
Results in four bytes in EDATA1–A4 being written to the Results in bytes 0–255 of internal XRAM being written
WRITE
Flash/EE data memory, at the page address given by
to the 256 bytes of Flash/EE program memory at the
EADRH/L (0 EADRH/L < 0400H)
page address given by EADRH. (0 EADRH < E0H)
Note:The four bytes in the page being addressed must
Note:The 256 bytes in the page being addressed must
be pre-erased.
03H
Reserved Command
04H
Verifies if the data in EDATA1–4 is contained in the
Not Implemented. Use the MOVC and MOVX
VERIFY
page address given by EADRH/L. A subsequent read
instructions to verify the WRITE in software.
of the ECON SFR will result in a 0 being read if the
verification is valid, or a nonzero value being read
to indicate an invalid verification.
05H
Results in the erase of the 4-bytes page of Flash/EE
Results in the 64-byte page of Flash/EE program
ERASE PAGE
data memory addressed by the page address EADRH/L
memory, addressed by the byte address EADRH/L
being erased. EADRL can equal any of 64 locations
within the page. A new page starts whenever EADRL
is equal to 00H, 40H, 80H, or C0H.
06H
Results in the erase of entire four Kbytes of Flash/EE
Results in the erase of the entire 56 Kbytes of ULOAD
ERASE ALL
data memory.
Flash/EE program memory.
81H
Results in the byte in the Flash/EE data memory,
Not Implemented. Use the MOVC command.
READBYTE
addressed by the byte address EADRH/L, being read
into EDATA1. (0 EADRH/L 0FFFH).
82H
Results in the byte in EDATA1 being written into
WRITEBYTE
Flash/EE data memory, at the byte address EADRH/L.
Flash/EE program memory at the byte address
EADRH/L (0 EADRH/L DFFFH).
0FH
Leaves the ECON instructions to operate on the
Enters Normal mode, directing subsequent ECON
EXULOAD
Flash/EE data memory.
instructions to operate on the Flash/EE data memory.
F0H
Enters ULOAD mode, directing subsequent ECON
Leaves the ECON instructions to operate on the Flash/EE
ULOAD
instructions to operate on the Flash/EE program memory.
program memory.
REV. A
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