參數(shù)資料
型號： ADUC836BCPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 65/80頁
文件大?。?/td> 0K
描述： IC MCU 62K FLASH ADC/DAC 56LFCSP
標準包裝： 2,500
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 62KB（62K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.25 V
數(shù)據(jù)轉換器： A/D 7x16b; D/A 1x12b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC836
–68–
ADuC836
–69–
Typical System Configuration
A typical ADuC836 configuration is shown in Figure 66. It sum-
marizes some of the hardware considerations discussed in the
previous paragraphs.
Figure 66 also includes connections for a typical analog mea-
surement application of the ADuC836, namely an interface to an
RTD (Resistive Temperature Device).The arrangement shown is
commonly referred to as a 4-wire RTD configuration.
Here, the on-chip excitation current sources are enabled to
excite the sensor.The excitation current flows directly through
the RTD, generating a voltage across the RTD proportional to
its resistance.This differential voltage is routed directly to the
positive and negative inputs of the primary ADC (AIN1, AIN2,
respectively).The same current that excited the RTD also flows
through a series resistance RREF, generating a ratiometric voltage
reference VREF.The ratiometric voltage reference ensures that
variations in the excitation current do not affect the measurement
system as the input voltage from the RTD and reference voltage
across RREF vary ratiometrically with the excitation current. Resis-
tor RREF must, however, have a low temperature coefficient to
avoid errors in the reference voltage over temperature. RREF must
also be large enough to generate at least a 1 V voltage reference.
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
VCC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
ADM3202
DVDD
27
34
33
31
30
29
28
39
38
37
36
35
32
40
47 46
44 43 42 41
52 51 50 49 48
45
DVDD
1k
DVDD
1k
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
DOWNLOAD/DEBUG
ENABLE JUMPER
(NORMALLY OPEN)
32.768kHz
DVDD
1
2
3
4
5
6
7
8
9
AVDD
200A/400A
EXCITATION
CURRENT
RTD
RREF
5.6k
AVDD
AGND
P1.2/IEXC1/DAC
REFIN–
REFIN+
P1.4/AIN1
P1.5/AIN2
DV
DD
DGND
PSEN
EA
DGND
DVDD
XTAL2
XTAL1
RESET
RX
D
TXD
DV
DD
DGND
NOT CONNECTED IN THIS EXAMPLE
ADuC836
P1.3/AIN5/DAC
DVDD
RS232 INTERFACE*
STANDARD D-TYPE
SERIAL COMMS
CONNECTOR TO
PC HOST
*EXTERNAL UART TRANSCEIVER INTEGRATED IN SYSTEM OR AS
PART OF AN EXTERNAL DONGLE AS DESCRIBED IN uC006.
ALL CAPACITORS IN THIS EXAMPLE ARE
0.1F CERAMIC CAPACITORS.
Figure 66. Typical System Configuration
REV. A
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