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參數(shù)資料
| 型號： | ADUC836BCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/80頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 56LFCSP |
| 標準包裝： | 2,500 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 7x16b; D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
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ADuC836
–32–
ADuC836
–33–
Programming the Flash/EE Data Memory
A user wishes to program F3H into the second byte on Page 03H
of the Flash/EE data memory space while preserving the other
three bytes already in this page.
A typical program of the Flash/EE Data array will involve:
1. Setting EADRH/L with the page address
2.Writing the data to be programmed to the EDATA1–4
3.Writing the ECON SFR with the appropriate command
Step 1: Set Up the Page Address
The two address registers, EADRH and EADRL, hold the high
byte address and the low byte address of the page to be addressed.
The assembly language to set up the address may appear as:
MOV EADRH,#0
; Set Page Address Pointer
MOV EADRL,#03H
Step 2: Set Up the EDATA Registers
The four values to be written into the page into the four SFRs
EDATA1–4. Since we do not know three of them, it is necessary
to read the current page and overwrite the second byte.
MOV ECON,#1 ; Read Page into EDATA1-4
MOV EDATA2,#0F3H ; Overwrite byte 2
Step 3: Program Page
A byte in the Flash/EE array can be programmed only if it has
previously been erased.To be more specific, a byte can only be
programmed if it already holds the value FFH. Because of the
Flash/EE architecture, this erase must happen at a page level.
Therefore, a minimum of four bytes (1 page) will be erased when
an erase command is initiated. Once the page is erased, we can
program the four bytes in-page and then perform a verification of
the data.
MOV ECON,#5 ; ERASE Page
MOV ECON,#2 ; WRITE Page
MOV ECON,#4 ; VERIFY Page
MOV A,ECON ; Check if ECON=0 (OK!)
JNZ ERROR
Note that although the four Kbytes of Flash/EE data memory
is shipped from the factory pre-erased, i.e., Byte locations
set to FFH, it is nonetheless good programming practice to
include an erase-all routine as part of any configuration/setup
code running on the ADuC836. An ERASE-ALL command
consists of writing 06H to the ECON SFR, which initiates an
erase of the 4-Kbyte Flash/EE array.This command coded in
8051 assembly would appear as:
MOV ECON,#06H ; Erase all Command
; 2 ms Duration
Flash/EE Memory Timing
Typical program and erase times for the ADuC836 are as follows:
Normal Mode (operating on Flash/EE data memory)
READPAGE (4 bytes)
– 5 machine cycles
WRITEPAGE (4 bytes)
– 380 s
VERIFYPAGE (4 bytes)
– 5 machine cycles
ERASEPAGE (4 bytes)
– 2 ms
ERASEALL (4 Kbytes)
– 2 ms
READBYTE (1 byte)
– 3 machine cycles
WRITEBYTE (1 byte)
– 200 s
ULOAD Mode (operating on Flash/EE program memory)
WRITEPAGE (256 bytes)
– 15 ms
ERASEPAGE (64 bytes)
– 2 ms
ERASEALL (56 Kbytes)
– 2 ms
WRITEBYTE (1 byte)
– 200 s
It should be noted that a given mode of operation is initiated as
soon as the command word is written to the ECON SFR.The
core microcontroller operation on the ADuC836 is idled until the
requested Program/Read or Erase mode is completed.
In practice, this means that even though the Flash/EE memory
mode of operation is typically initiated with a two-machine
cycle MOV instruction (to write to the ECON SFR), the next
instruction will not be executed until the Flash/EE operation is
complete.This means that the core will not respond to interrupt
requests until the Flash/EE operation is complete, although the
core peripheral functions like counter/timers will continue to
count and time as configured throughout this period.
REV. A
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