- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11199 > ADUC836BCPZ-REEL (Analog Devices Inc)IC MCU 62K FLASH ADC/DAC 56LFCSP PDF資料下載
參數(shù)資料
| 型號： | ADUC836BCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/80頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 56LFCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 7x16b; D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
ADuC836
–14–
ADuC836
–15–
When accessing the internal XRAM, the P0 and P2 port pins, as
well as the RD and WR strobes, will not be output as per a stan-
dard 8051 MOVX instruction.This allows the user to use these
port pins as standard I/O.
The upper 1792 bytes of the internal XRAM can be configured
to be used as an extended 11-bit stack pointer. By default, the
stack will operate exactly like an 8052 in that it will roll over from
FFH to 00H in the general-purpose RAM. On the ADuC836
however, it is possible (by setting CFG836.7) to enable the 11-bit
extended stack pointer. In this case, the stack will roll over from
FFH in RAM to 0100H in XRAM.The 11-bit stack pointer is
visible in the SP and SPH SFRs.The SP SFR is located at 81H
as with a standard 8052.The SPH SFR is located at B7H.The
3 LSBs of this SFR contain the three extra bits necessary to
extend the 8-bit stack pointer into an 11-bit stack pointer.
UPPER 1792
BYTES OF
ON-CHIP XRAM
(DATA + STACK
FOR EXSP = 1,
DATA ONLY
FOR EXSP = 0)
256 BYTES OF
ON-CHIP DATA
RAM
(DATA +
STACK)
LOWER 256
BYTES OF
ON-CHIP XRAM
(DATA ONLY)
00H
FFH
00H
07FFH
CFG836.7 = 0
CFG836.7 = 1
100H
Figure 4. Extended Stack Pointer Operation
External Data Memory (External XRAM)
Just like a standard 8051 compatible core, the ADuC836 can
access external data memory using a MOVX instruction.The
MOVX instruction automatically outputs the various control
strobes required to access the data memory.
The ADuC836, however, can access up to 16 Mbytes of external
data memory.This is an enhancement of the 64 Kbytes external
data memory space available on a standard 8051 compatible core.
The external data memory is discussed in more detail in the
ADuC836 Hardware Design Considerations section.
SPECIAL FUNCTION REGISTERS (SFRS)
The SFR space is mapped into the upper 128 bytes of internal
data memory space and accessed by direct addressing only. It
provides an interface between the CPU and all on-chip periph-
erals. A block diagram showing the programming model of the
ADuC836 via the SFR area is shown in Figure 5.
128-BYTE
SPECIAL
FUNCTION
REGISTER
AREA
62 KBYTE ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE FLASH/EE
PROGRAM MEMORY
8051
COMPATIBLE
CORE
OTHER ON-CHIP
PERIPHERALS
TEMP SENSOR
CURRENT SOURCES
12-BIT DAC
SERIAL I/O
WDT, PSM
TIC, PLL
DUAL - ADCs
4 KBYTE
ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE
FLASH/EE DATA
MEMORY
256 BYTES RAM
2K XRAM
Figure 5. Programming Model
All registers, except the Program Counter (PC) and the four
general-purpose register banks, reside in the SFR area.The SFR
registers include control, configuration, and data registers that
provide an interface between the CPU and all on-chip peripherals.
Accumulator SFR (ACC)
ACC is the Accumulator Register, which is used for math
operations including addition, subtraction, integer multiplication,
and division, and Boolean bit manipulations.The mnemonics for
accumulator-specific instructions, refer to the Accumulator as A.
B SFR (B)
The B Register is used with the ACC for multiplication and
division operations. For other instructions, it can be treated as a
general-purpose scratch pad register.
Data Pointer (DPTR)
The Data Pointer is made up of three 8-bit registers, named DPP
(page byte), DPH (high byte), and DPL (low byte).These are
used to provide memory addresses for internal and external code
access and external data access. It may be manipulated as a 16-bit
register (DPTR = DPH, DPL), although INC DPTR instructions
will automatically carry over to DPP, or as three independent 8-bit
registers (DPP, DPH, DPL).
The ADuC836 supports dual data pointers. For more information,
refer to the Dual Data Pointer section.
REV. A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-BTM-IW | CONVERTER MOD DC/DC 10V 100W |
| MC74VHC4316DTR2G | IC MUX/DEMUX QUAD 1X1 16TSSOP |
| VI-BT1-IW-F1 | CONVERTER MOD DC/DC 12V 100W |
| MC74VHC4316DR2G | IC MUX/DEMUX QUAD 1X1 16SOIC |
| MC14016BFELG | IC SWITCH 1X1 14SOEIAJ |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC836BS | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 52-Pin MQFP 制造商:Analog Devices 功能描述:8BIT MCU +16BIT DUAL ADC MQFP52 |
| ADUC836BS | 制造商:Analog Devices 功能描述:IC SEMICONDUCTOR ((NS)) |
| ADUC836BSZ | 功能描述:IC ADC DUAL 16BIT W/MCU 52-MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| ADUC841 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC841BCP32-5 | 制造商:Analog Devices 功能描述:MICROCONVERTER 1-CYCLE VERSION ADUC829 - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。